pca24s08a NXP Semiconductors, pca24s08a Datasheet - Page 9

• Manufacturer Part Number: pca24s08a
• Description: 1024 ? 8-bit Cmos Eeprom With Access Protection
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA24S08A_1
Product data sheet
Accessed within the Access Protection Page is an individual CMOS Sticky Bit (SB) for
each of the 8 blocks on the device. When the value of the sticky bit is ‘0’, the Protection
Bits (PB) for the corresponding block may not be changed via the software. These bits are
all set to logic 1 when power is initially applied or when the PROT pin is LOW. These
sticky bits may be written only to a ‘0’ via the serial interface using the standard serial write
operations. Reading the sticky bits does not affect their state.
Because permissions are set individually for each of the blocks, all reads via serial port
will only read bytes within the block that was specified when the current address was
latched in the device (with a write command). The block address bits (B2 or B1) that are
sent with the write command are ignored on a read command.
When a sticky bit is cleared (programmed at 0), the byte containing the sticky bit cannot
be changed anymore. If a write operation to this byte is attempted, it will be normally
acknowledged but no change will happen in the byte value. The device does not go to an
E/W cycle and can be accessed immediately.
If a block is protected and only read operation is allowed (the corresponding APP register
has its PB bits programmed to 10b), a write operation to this block is not acknowledged
(Slave Address and Register pointer only are acknowledged). The device does not go to
an E/W cycle and can be accessed immediately.
This applies to:
If a block is protected and neither read operation nor write operation is allowed (the
corresponding APP register has its PB bits programmed to 00b or 01b), a write operation
to this block is not acknowledged (Slave Address and Register pointer only are
acknowledged).
A read operation to this block is not allowed.
This applies to:
•
•
•
•
S – Addr+W – ACK – Reg Pointer – ACK – Data – NACK
S – Addr+W – ACK – Reg Pointer – ACK – Data – NACK
S – Addr+W – ACK – Reg Pointer – ACK – Sr – Addr+R – NACK
S – Addr+W – ACK – Reg Pointer – ACK – P – S – Addr+R – NACK
EEPROM block 0 to block 7, controlled by PB0 to PB7.
The last 7 bytes of the APP block (09h to 0Fh) and the ID page (10h to 1Fh) controlled
by PBAP.
EEPROM block 0 to block 7, controlled by PB0 to PB7.
The last 7 bytes of the APP block (09h to 0Fh) and the ID page (10h to 1Fh) controlled
by PBAP.
Rev. 01 — 19 January 2010
1024 × 8-bit CMOS EEPROM with access protection
PCA24S08A
© NXP B.V. 2010. All rights reserved.
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