pca24s08a NXP Semiconductors, pca24s08a Datasheet - Page 15

• Manufacturer Part Number: pca24s08a
• Description: 1024 ? 8-bit Cmos Eeprom With Access Protection
• Manufacturer: NXP Semiconductors

NXP Semiconductors
9. Dynamic characteristics
Table 8.
C
[1]
[2]
[3]
PCA24S08A_1
Product data sheet
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
t
SCL
BUF
HD;STA
SU;STA
SU;STO
HD;DAT
VD;ACK
VD;DAT
SU;DAT
LOW
HIGH
f
r
SP
L
Fig 12. Timing diagram for serial interface
= 1 TTL gate and 100 pF, except as noted. V
t
t
C
VD;ACK
VD;DAT
b
SDA
SCL
= total capacitance of one bus line in pF.
= minimum time for SDA data out to be valid following SCL LOW.
= time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
Parameter
SCL clock frequency
bus free time between a STOP and
START condition
hold time (repeated) START condition
set-up time for a repeated START
condition
set-up time for STOP condition
data hold time
data valid acknowledge time
data valid time
data set-up time
LOW period of the SCL clock
HIGH period of the SCL clock
fall time of both SDA and SCL signals
rise time of both SDA and SCL signals
pulse width of spikes that must be
suppressed by the input filter
Dynamic characteristics
P
t
BUF
S
t
HD;STA
t
LOW
t
t
r
HD;DAT
DD
Rev. 01 — 19 January 2010
= 2.5 V to 3.6 V.
Conditions
LOW level
HIGH level
t
HIGH
t
f
t
1024 × 8-bit CMOS EEPROM with access protection
SU;DAT
[1]
[2]
[2]
Standard-mode
Min
250
4.7
4.0
4.7
4.0
4.7
4.0
0
0
-
-
-
-
-
-
I
2
Sr
C-bus
1500
1000
Max
100
600
600
300
t
50
SU;STA
-
-
-
-
-
-
-
-
t
HD;STA
20 + 0.1C
20 + 0.1C
Fast-mode I
PCA24S08A
Min
100
1.3
0.6
0.6
0.6
1.3
0.6
0
0
-
-
-
-
t
SP
t
b
b
SU;STO
[3]
[3]
© NXP B.V. 2010. All rights reserved.
2
C-bus
Max
400
600
600
600
300
300
002aaa986
50
-
-
-
-
-
-
-
-
P
15 of 24
Unit
kHz
μs
μs
μs
μs
ns
ns
ns
ns
ns
μs
μs
ns
ns
ns