uda1351h NXP Semiconductors, uda1351h Datasheet - Page 10

• Manufacturer Part Number: uda1351h
• Description: 96 Khz Iec 958 Audio Dac
• Manufacturer: NXP Semiconductors

Philips Semiconductors
8.2
The UDA1351H contains an on-board PLL for
regenerating a system clock from the IEC 958 input
bitstream or the incoming digital data stream via the data
input interface. In addition to the system clock for the
on-board digital sound processing the PLL also generates
a 256f
absence of an input signal the clock will generate
a minimum frequency to warrant system functionality.
Remark: in case of no input signal, the PLL generates
a minimum frequency and the output spectrum shifts
accordingly. Since the analog output does not have
a analog mute, this means noise which is out of band noise
under normal operation conditions, can move into the
audio band.
When the on-board clock has locked to the incoming
frequency the lock indicator bit will be set and can be read
via the L3 interface. Internally the PLL lock indication is
combined with the PCM status bit of the input data stream.
When both the IEC 958 decoder and the on-board clock
have locked to the incoming signal and the input data
stream is PCM data, then pin LOCK will be asserted.
However, when the IC is locked but the PCM status bit
reports non-PCM data then pin LOCK is returned to LOW
level.
2000 Jul 27
handbook, halfpage
96 kHz IEC 958 audio DAC
Fig.3 Example of external analog mute circuit.
s
Clock regeneration and lock detection
clock output for use in the application. In the
UDA1351H
RIGHT
LEFT
DAC
DAC
21
18
22
LOCK
VOUTL
VOUTR
MBL213
V DD
V SS
10
The lock indication output can be used, for example, for
muting purposes. The lock signal can be used to drive an
external analog mute circuit to prevent out of band noise to
become audible in case the PLL runs at its minimum
frequency (e.g. when there is no SPDIF input signal).
An example is given in Fig.3 where V
power supply and V
8.3
The UDA1351H is equipped with a cosine roll-off mute in
the DSP data path of the DAC part. Muting the DAC, by
pin MUTE (in static mode) or via bit MT (in L3 mode) will
result in a soft mute as presented in Fig.4. The cosine
roll-off soft mute takes 32
sampling frequency of 44.1 kHz.
When operating in the L3 control mode the device will
mute on start-up. In L3 mode it is necessary to explicitly
switch off the mute for audio output by means of the MT bit
in the L3 register.
In the L3 mode pin MUTE does not have any function (the
same holds for several other pins) and can either be left
open-circuit (since it has an internal pull-down resistor) or
be connected to ground.
handbook, halfpage
factor
mute
Fig.4 Mute as a function of raised cosine roll-off.
0.8
0.6
0.4
0.2
Mute
1
0
0
SS
1
is the negative power supply.
32 samples = 24 ms at a
2
Product specification
DD
UDA1351H
t (ms)
is the positive
MGS755
3