uda1351h NXP Semiconductors, uda1351h Datasheet - Page 21

• Manufacturer Part Number: uda1351h
• Description: 96 Khz Iec 958 Audio Dac
• Manufacturer: NXP Semiconductors

Philips Semiconductors
8.7.8
8.7.8.1
By writing to the 7FH register, all L3 control values are
restored to their default values. Only the L3 interface is
affected, the system will not be reset. Consequently
readable registers, which are not reset, can be affected.
8.7.8.2
A 1-bit value to switch the DAC on and off.
Table 10 Power-on setting
8.7.8.3
A 1-bit value to select an IEC 958 input channel.
Table 11 Slicer input selection
8.7.8.4
A 1-bit value to select the source for clock regeneration,
either from the IEC 958 input or digital data input interface.
In the event that the IEC 958 input is used as a clock
source the UDA1351H is clock master on the digital data
output and input interfaces.
Table 12 Clock source selection
8.7.8.5
A 1-bit value to select the data source, either the IEC 958
input or the digital data input interface.
2000 Jul 27
CHAN sel
96 kHz IEC 958 audio DAC
IIS sel
PON
0
1
0
1
0
1
W
Restoring L3 defaults
Power-on
Slicer input selection
Clock source selection
DAC input selection
RITABLE REGISTERS
power-down
power-on (default setting)
IEC 958 input from pin SPDIF0
(default setting)
IEC 958 input from pin SPDIF1
slave to audio sampling frequency of
IEC 958 input (default setting)
slave to audio sampling frequency of
digital data input interface
FUNCTION
FUNCTION
FUNCTION
21
Table 13 DAC input selection
8.7.8.6
A 2-bit value to set the serial format for the digital data
output and input interfaces.
Table 14 Serial format settings
8.7.8.7
A 2-bit value to program the mode for the sound
processing filters of bass boost and treble.
Table 15 Filter mode settings
8.7.8.8
A 2-bit value to program the treble setting in combination
with the filter mode settings. At f
point for minimum setting is 3.0 kHz and the 3 dB point
for maximum setting is 1.5 kHz. The default value is ‘00’.
Table 16 Treble settings
SFOR1 SFOR0
TR1
M1
0
0
1
1
0
0
1
1
0
0
1
1
SPD sel
0
1
Serial format selection
Filter mode selection
Treble
TR0
M0
0
1
0
1
0
1
0
1
0
1
0
1
input from data input interface
input from IEC 958 (default setting)
I
LSB-justified, 16 bits
LSB-justified, 20 bits
LSB-justified, 24 bits
flat (default setting)
minimum
maximum
FLAT (dB)
2
S-bus (default settings)
0
0
0
0
s
FUNCTION
FUNCTION
FUNCTION
MIN. (dB)
= 44.1 kHz the 3 dB
LEVEL
Product specification
0
2
4
6
UDA1351H
MAX. (dB)
0
2
4
6