dsp56001a Freescale Semiconductor, Inc, dsp56001a Datasheet - Page 44

• Manufacturer Part Number: dsp56001a
• Description: 24-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

DSP56001A
External Bus Asynchronous Timing
EXTERNAL BUS ASYNCHRONOUS TIMING
V
T
WS = Number of Wait States, as determined by BCR (WS = 0 to 15)
Capacitance Derating: The DSP56001A external bus timing specifications are designed and
tested at the maximum capacitive load of 50 pF, including stray capacitance. Typically, the drive
capability of the external bus pins (A0-A15, D0-D23, PS, DS, RD, WR, X/Y) derates linearly at 1 ns
per 12 pF of additional capacitance from 50 pF to 250 pF of loading. Port B and C pins (HI, SCI,
SSI) derate linearly at 1 ns per 5 pF of additional capacitance from 50 pF to 250 pF of loading.
Active low lines should be pulled up in a manner consistent with the AC and DC specifications.
2-26
J
CC
No.
115 Delay from BR Assertion to BG
116 Delay from BR Deassertion to
117 BG Deassertion Duration
118 Delay from Address, Data, and
= –40 to 105 ˚C; C
= 5.0 V 10% for 27 MHz;V
Assertion
BG Deassertion
Control Bus High Impedance to
BG Assertion
•
•
•
•
•
With no external access
from the DSP
During external read or
write access
During external read-
modify-write access
During Stop mode
external bus will not be
released and BG will
not go low
During Wait mode
Characteristics
L
= 50 pF + 1 TTL loads
Table 2-13 External Bus Asynchronous Timing
Freescale Semiconductor, Inc.
—
For More Information On This Product,
CC
= 5.0 V 5% for 33 MHz;
DSP56001A/D, Rev. 1
2 T
2 T
T
T
T
Go to: www.freescale.com
2 T
C
C
Min
H
C
—
C
+ T
+ T
8
0
+ T
+ 3
+ T
C
H
H
27 MHz
H
H
–
2 T
4 T
6 T
T
T
4 T
C
C
4 T
T
+ T
H
Max
C
C
C
WS + 15
15
—
—
—
C
+ 15
+ T
+ T
H
C
+ 15
WS +
+ 23
+
H
H
+
+
2 T
2 T
T
T
T
2 T
C
C
Min
H
C
—
C
+ T
+ T
6
0
+ T
+ 3
+ T
C
H
H
33 MHz
H
H
–
2 T
4 T
6 T
T
T
4 T
C
C
4 T
T
+ T
H
Max
C
C
C
WS + 13
13
—
—
—
MOTOROLA
C
+ 13
+ T
+ T
H
C
+ 13
WS +
+ 19
+
H
H
+
+
Unit
ns
ns
ns
ns
ns
ns
ns
ns