dsp56001a Freescale Semiconductor, Inc, dsp56001a Datasheet - Page 49

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dsp56001a

Manufacturer Part Number
dsp56001a
Description
24-bit Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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A0–A15,
DS, PS,
Note:
Num
CKOUT
Note:
D0–D23
X/Y
WR
RD
1.
2.
3.
4.
During Read-Modify-Write Instructions, the address lines do not change states.
140
AC timing specifications which are referenced to a device input signal are measured in
production with respect to the 50% point of the respective input signal’s transition.
WS are wait state values specified in the BCR.
Clk Low transition to data-out invalid (specification # T146) and Clk Low transition to address
invalid (specification # T149) indicate the time after which data/address are no longer
guaranteed to be valid.
Timings are given from Clk midpoint to V
Characteristics
Table 2-14 External Bus Synchronous Timing (Continued)
141
Freescale Semiconductor, Inc.
T0
For More Information On This Product,
Figure 2-23 Synchronous Bus Timing
T1
145
Go to: www.freescale.com
DSP56001A/D, Rev. 1
T2
Min
Data Out
146
T3
27 MHz
OL
142
143
or V
T0
Max
OH
of the corresponding signal(s).
T1
147
External Bus Synchronous Timing
Min
144
T2
Data In
33 MHz
T3
Max
148
T0
DSP56001A
149
AA0395
Unit
2-31

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