dsp56001a Freescale Semiconductor, Inc, dsp56001a Datasheet - Page 83

• Manufacturer Part Number: dsp56001a
• Description: 24-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

DSP Programming Considerations
DMA, HF1, HF0, and HCP, HTDE, and HRDF status bits are set or cleared by the host processor
side of the interface. These bits are individually synchronized to the DSP clock. (Refer to the
User’s Manual for descriptions of these status bits.)
Care must be exercised when reading status bits HF0 and HF1 as an encoded pair, because the
four combinations (00, 01, 10, and 11) each have significance. A very small probability exists that
the DSP will read the status bits during transition. Therefore, HF0 and HF1 should be read twice
and checked for consensus.
MOTOROLA
SYNCHRONIZATION OF STATUS BITS FROM HOST TO DSP
READING HF0 AND HF1 AS AN ENCODED PAIR
Freescale Semiconductor, Inc.
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DSP56001A/D, Rev. 1
Host Port Considerations
DSP56001A
4-9