tspc860 ATMEL Corporation, tspc860 Datasheet - Page 15

• Manufacturer Part Number: tspc860
• Description: Integrated Communication Processor
• Manufacturer: ATMEL Corporation

Table 1. Signal Descriptions (Continued)
2129B–HIREL–12/04
IP_A(0-1)
IOIS16_A
IP_A(3-7)
SRESET
CLKOUT
EXTCLK
WAIT_A
WAIT_B
ALE_A
CE1_A
CE2_A
EXTAL
Name
IP_A2
TEXP
XTAL
XFC
SPLL locked,
oscillating
High until
Analog
Driving
Analog
Driving
Reset
High
High
High
Hi-Z
then
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Low
Low
U5, T6, T3
Number
W2, U4,
T5, T4
W3
N1
N2
N3
R3
R4
U3
P2
P1
T2
K2
B3
A3
Analog Input
Analog Input
Open-drain
Input (3.3V
(3.3V only)
Analog
Output
Output
Output
Output
Output
Output
Type
Input
Input
Input
Input
Input
only)
Description
Soft Reset—Asserting this open drain line puts the TSPC860 in soft
reset state.
This output is one of the connections to an external crystal for the
internal oscillator circuitry.
This line is one of the connections to an external crystal for the
internal oscillator circuitry.
External Filter Capacitance—This input is the connection pin for an
external capacitor filter for the PLL circuitry.
Clock Out—This output is the clock system frequency.
External Clock — This input is the external input clock from an
external source.
Timer Expired—This output reflects the status of PLPRCR[TEXPS].
Address Latch Enable A—This output is asserted when TSPC860
initiates an access to a region under the control of the PCMCIA
interface to socket A.
Card Enable 1 Slot A—This output enables even byte transfers when
accesses to PCMCIA Slot A are handled under the control of the
PCMCIA interface.
Card Enable 2 Slot A—This output enables odd byte transfers when
accesses to PCMCIA Slot A are handled under the control of the
PCMCIA interface.
Wait Slot A—This input, if asserted low, causes a delay in the
completion of a transaction on the PCMCIA controlled Slot A.
Wait Slot B—This input, if asserted low, causes a delay in the
completion of a transaction on the PCMCIA controlled Slot B.
Input Port A 0-1—The TSPC860 monitors these inputs that are
reflected in the PIPR and PSCR of the PCMCIA interface.
Input Port A 2—The TSPC860 monitors these inputs; its value and
changes are reported in the PIPR and PSCR of the PCMCIA
interface.
I/O Device A is 16-Bits Ports Size—The TSPC860 monitors this
input when a transaction under the control of the PCMCIA interface
is initiated to an I/O region in socket A of the PCMCIA space.
Input Port A 3-7—The TSPC860 monitors these inputs; their values
and changes are reported in the PIPR and PSCR of the PCMCIA
interface.
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