tspc860 ATMEL Corporation, tspc860 Datasheet - Page 71

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tspc860

Manufacturer Part Number
tspc860
Description
Integrated Communication Processor
Manufacturer
ATMEL Corporation
Datasheet
SCC In NMSI Mode
Electrical Specifications
Table 20. NMSI External Clock Timing
Notes:
Table 21. NMSI Internal Clock Timing
Notes:
2129B–HIREL–12/04
Num
Num
100
101
102
103
104
105
106
107
108
100
102
103
104
105
106
107
108
1. The ratio SyncCLK/RCLK1 and SyncCLK/TCLK1 must be greater or equal to 2.25/1.
2. Also applies to CD and CTS hold time when they are used as an external sync signals.
1. The ratios SyncCLK/RCLK1 and SyncCLK/TCLK1 must be greater or equal to 3/1
2. Also applies to CD and CTS hold time when they are used as an external sync signals.
Characteristic
RCLK1 and TCLK1 Width High
RCLK1 and TCLK1 Width Low
RCLK1 and TCLK1 Rise/Fall Time
TXD1 Active Delay (From TCLK1 Falling Edge)
CTS1 Setup Time to TCLK1 Rising Edge
RXD1 Setup Time to RCLK1 Rising Edge
RXD1 Hold Time from RCLK1 Rising Edge
CD1 Setup Time to RCLK1 Rising Edge
RTS1 Active/Inactive Delay (From TCLK1 Falling Edge)
Characteristic
RCLK1 and TCLK frequency1
RCLK1 and TCLK1 Rise/Fall Time
TXD1 Active Delay (From TCLK1 Falling Edge)
RTS1 Active/Inactive Delay (From TCLK1 Falling Edge)
CTS1 Setup Time to TCLK1 Rising Edge
RXD1 Setup Time to RCLK1 Rising Edge
RXD1 Hold Time from RCLK1 Rising Edge
CD1 Setup Time to RCLK1 Rising Edge
(1)
(1)
(2)
(2)
1/SYNCCLK + 5
1/SYNCCLK
Min
Min
40
40
40
0
0
0
0
0
0
5
5
5
5
All Frequencies
All Frequencies
SYNCCLK/3
Max
Max
30
30
15
50
50
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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