tspc860 ATMEL Corporation, tspc860 Datasheet - Page 74

• Manufacturer Part Number: tspc860
• Description: Integrated Communication Processor
• Manufacturer: ATMEL Corporation

Figure 63. Ethernet Collision Timing Diagram
Figure 64. Ethernet Receive Timing Diagram
Figure 65. Ethernet Transmit Timing Diagram
Notes:
74
RENA (CD1)
(INPUT)
(INPUT)
TENA (RTS1)
RCLK1
RENA (CD1)
RXD1
2. If RENA is deasserted before TENA, or RENA is not asserted at all during transmit, then the CSL bit is set in the buffer
1. Transmit clock invert (TCI) bit in GSMR is set.
TSPC860 [Preliminary]
descriptor at the end of the frame transmission.
(Output)
(Note 2)
TCLK1
(Input)
(Input)
TXD1
128
CLSN (CTS1)
(Input)
131
133
121
124
128
121
125
132
120
121
129
126
LAST BIT
123
134
127
2129B–HIREL–12/04