tspc860 ATMEL Corporation, tspc860 Datasheet - Page 20

• Manufacturer Part Number: tspc860
• Description: Integrated Communication Processor
• Manufacturer: ATMEL Corporation

Table 1. Signal Descriptions (Continued)
20
REJECT1
L1TCLKB
SPIMOSI
SPIMISO
SMRXD1
SMTXD1
RSTRT2
BRGO4
SPISEL
SPICLK
BRGO4
I2CSDA
BRGO1
I2CSCL
BRGO2
TOUT4
PB[31]
PB[30]
PB[29]
PB[28]
PB[27]
PB[26]
PB[25]
PB[24]
Name
CLK7
CLK8
PA[1]
PA[0]
TIN4
TSPC860 [Preliminary]
Reset
Hi-Z
Number
U19
C17
C19
E16
D19
E19
T19
F19
J16
J18
Bidirectional
Bidirectional
Bidirectional
Open-drain)
Bidirectional
Open-drain)
Bidirectional
Open-drain)
Bidirectional
Open-drain)
Bidirectional
Open-drain)
Bidirectional
Open-drain)
Bidirectional
Open-drain)
Bidirectional
Open-drain)
(Optional:
(Optional:
(Optional:
(Optional:
(Optional:
(Optional:
(Optional:
(Optional:
Type
Description
General-Purpose I/O Port A Bit 1—Bit 1 of the general-purpose I/O
port A.
CLK7—One of eight clock inputs that can be used to clock SCCs
and SMCs.
TIN4—Timer 4 external clock input.
BRGO4—BRG4 output clock.
General-Purpose I/O Port A Bit 0—Bit 0 of the general-purpose I/O
port A.
CLK8—One of eight clock inputs that can be used to clock SCCs
and SMCs.
TOUT4—Timer 4 output.
L1TCLKB—Transmit clock for the serial interface TDM port B.
General-Purpose I/O Port B Bit 31—Bit 31 of the general-purpose
I/O port B.
SPISEL—SPI slave select input.
REJECT1—SCC1 CAM interface reject pin.
General-Purpose I/O Port B Bit 30—Bit 30 of the general-purpose
I/O port B.
SPICLK—SPI output clock when it is configured as a master or SPI
input clock when it is configured as a slave.
RSTRT2—SCC2 serial CAM interface output signal that marks the
start of a frame.
General-Purpose I/O Port B Bit 29—Bit 29 of the general-purpose
I/O port B.
SPIMOSI—SPI output data when it is configured as a master or SPI
input data when it is configured as a slave.
General-Purpose I/O Port B Bit 28—Bit 29 of the general-purpose
I/O port B.
SPIMISO—SPI input data when the TSPC860 is a master; SPI
output data when it is a slave.
BRGO4—BRG4 output clock.
General-Purpose I/O Port B Bit 27—Bit 27 of the general-purpose
I/O port B.
I2CSDA—
an open-drain output.
BRGO1—BRG1 output clock.
General-Purpose I/O Port B Bit 26—Bit 26 of the general-purpose
I/O port B.
I2CSCL—
as an open-drain output.
BRGO2—BRG2 output clock.
General-Purpose I/O Port B Bit 25—Bit 25 of the general-purpose
I/O port B.
SMTXD1—SMC1 transmit data output.
General-Purpose I/O Port B Bit 24—Bit 24 of the general-purpose
I/O port B.
SMRXD1—SMC1 receive data input.
TWI
TWI
serial data pin. Bidirectional; should be configured as
serial clock pin. Bidirectional; should be configured
2129B–HIREL–12/04