isp1507a NXP Semiconductors, isp1507a Datasheet - Page 13

• Manufacturer Part Number: isp1507a
• Description: Lpi Hi-speed Universal Serial Bus On-the-go Transceive
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ISP1507A_ISP1507B_1
Product data sheet
7.9.10 PSW_N
7.9.11 V
7.9.8 C_A and C_B
7.9.9 V
The C_A and C_B pins are to connect the flying capacitor of the charge pump. The output
current capability of the charge pump depends on the value of the capacitor used, as
shown in
For details, see
If the charge pump is not used, C_A and C_B must be left floating (not connected).
Table 3.
V
recommended. For details, see
PSW_N is an active LOW, open-drain output pin. This pin can be connected to an active
LOW, external V
power source. An external pull-up resistor, R
pin is open-drain, allowing ganged-mode power control for multiple USB ports. For
application details, see
If the link is in host mode, it can enable the external V
DRV_VBUS_EXT bit in the OTG_CTRL register (see
ISP1507 will drive PSW_N to LOW to enable the external V
detects an overcurrent condition (the V
external V
This pin acts as an input to V
pump, and SRP charge and discharge resistors.
When the DRV_VBUS bit in the OTG_CTRL register (see
the ISP1507 drives V
capability of 8 mA.
C
22 nF
270 nF
Fig 4.
CC
CC
BUS
cp(C_A)-(C_B)
is the main input supply voltage for the ISP1507. Decoupling capacitors are
Table
Charge pump capacitor
BUS
Recommended charge pump capacitor value
power source by setting DRV_VBUS_EXT to logic 0.
3. For maximum efficiency, place capacitors as close as possible to pins.
Section
BUS
switch or charge pump enable circuit to control the external V
BUS
Section
Rev. 01 — 19 May 2008
16.
to a voltage of 4.4 V to 5.25 V, with a minimum output current
BUS
ISP1507
Section
16.
comparators, and also as a power pin for the charge
BUS
C_A
C_B
16.
V
BUS
state in RXCMD is not 11b), it must disable the
pullup
004aab038
I
8 mA
50 mA
ISP1507A; ISP1507B
L
(max)
, is required when PSW_N is used. This
C cp(C_A)-(C_B)
I L
Section
BUS
ULPI HS USB OTG transceiver
Section
power source by setting the
BUS
10.1.4) to logic 1. The
power source. If the link
10.1.4) is set to logic 1,
© NXP B.V. 2008. All rights reserved.
BUS
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