isp1507a NXP Semiconductors, isp1507a Datasheet - Page 7

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isp1507a

Manufacturer Part Number
isp1507a
Description
Lpi Hi-speed Universal Serial Bus On-the-go Transceive
Manufacturer
NXP Semiconductors
Datasheet

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Table 2.
[1]
[2]
[3]
[4]
ISP1507A_ISP1507B_1
Product data sheet
Symbol
V
REG3V3
XTAL1
XTAL2
RESET_N
REG1V8
DIR
STP
NXT
V
DATA7
DATA6
DATA5
DATA4
CLOCK
DATA3
CHIP_SELECT_
N
V
DATA2
DATA1
GND
BUS
CC(I/O)
CC(I/O)
Symbol names ending with underscore N, for example, NAME_N, indicate active LOW signals.
For details on external components required on each pin, see bill of materials and application diagrams in
I = input; O = output; I/O = digital input/output; OD = open-drain output; AI = analog input; AO = analog output; AI/O = analog
input/output; P = power or ground pin.
A detailed description of these pins can be found in
[1][2]
Pin description
Pin
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
die
pad
Type
AI/O
P
AI
AO
I
P
O
I
O
P
I/O
I/O
I/O
I/O
O
I/O
I
P
I/O
I/O
P
…continued
[3]
Description
V
5 V tolerant
3.3 V regulator output
crystal oscillator or clock input
crystal oscillator output
active LOW, asynchronous reset input
plain input
1.8 V regulator output
ULPI direction signal
slew-rate controlled output (1 ns)
ULPI stop signal
plain input; programmable pull up
ULPI next signal
slew-rate controlled output (1 ns)
I/O supply rail
pin 7 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
pin 6 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
pin 5 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
pin 4 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
60 MHz clock output
slew-rate controlled output (1 ns); plain input
pin 3 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
active LOW chip select
plain input
I/O supply rail
pin 2 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
pin 1 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
ground supply; down bonded to the exposed die pad (heat sink); to be connected to
the PCB ground
BUS
pin of the USB cable
Section
Rev. 01 — 19 May 2008
[4]
7.9.
ISP1507A; ISP1507B
ULPI HS USB OTG transceiver
Section
© NXP B.V. 2008. All rights reserved.
16.
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