is42s16800a1 Integrated Silicon Solution, Inc., is42s16800a1 Datasheet - Page 20

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is42s16800a1

Manufacturer Part Number
is42s16800a1
Description
8meg 128-mbit Synchronous Dram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
IS42S16800A1
20
Burst Write with Auto-Precharge Interrupted by Read
Precharge Command
The Precharge Command is used to precharge or close a bank that has been activated. The Precharge Command is triggered
when CS, RAS, and WE are low and CAS is high at the rising edge of the clock. The Precharge Command can be used to pre-
charge each bank separately or all banks simultaneously. Three address bits, A10, BA0, and BA1, are used to define which
bank(s) is to be precharged when the command is issued.
Bank Selection for Precharge by Address Bits
For read cycles, the Precharge Command may be applied (CAS latency - 1) prior to the last data output. For write cycles, a
delay must be satisfied from the start of the last burst write cycle until the Precharge Command can be issued. This delay is
known as t
After the Precharge Command is issued, the precharged bank must be reactivated before a new read or write access can be
executed. The delay between the Precharge Command and the Activate Command must be greater than or equal to the Pre-
charge time (t
CK
COMMAND
CAS latency = 3
t
CK3
,
DQs
DPL
HIGH
RP
LOW
, Data-in to Precharge delay.
A10
).
Auto-Precharge
T0
WRITE A
DIN A
0
T1
DIN A
NOP
1
T2
DIN A
DON’T CARE
NOP
Bank Select
BA0, BA1
2
Integrated Silicon Solution, Inc. — www.issi.com —
T3
READ B
T4
NOP
t
DAL
*
t
Bank A can be reactivated at completion of t
See the Clock Frequency and Latency table.
T5
DAL
NOP
is a function of clock cycle time and speed sort.
N
Single bank defined by BA0, BA1
(Burst Length = 4, CAS Latency = 3)
Precharged Bank(s)
T6
DOUT B
NOP
All Banks
0
©
T7
*
DOUT B
NOP
1
T8
ISSI
DOUT B
NOP
1-800-379-4774
DAL
2
.
05/01/06
Rev. 00B
®

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