is43dr16128 Integrated Silicon Solution, Inc., is43dr16128 Datasheet - Page 11

• Manufacturer Part Number: is43dr16128
• Description: 2gb X16 Ddr2 Sdram
• Manufacturer: Integrated Silicon Solution, Inc.

IS43/46DR16128
required. The addressing is generated by the internal refresh controller. This makes the address bits a “Don’t Care” during a
REFRESH command.
SELF REFRESH
The SELF REFRESH command can be used to retain data in the DDR2 SDRAM, even if the rest of the system is powered down. When
in the self refresh mode, the DDR2 SDRAM retains data without external clocking. All power supply inputs (including VREF) must be
maintained at valid levels upon entry/exit and during SELF REFRESH operation.
The SELF REFRESH command is initiated like a REFRESH command except CKE is LOW. The DLL is automatically disabled upon
entering self refresh and is automatically enabled upon exiting self refresh.
ODT (On‐Die Termination)
The On‐Die Termination feature allows the DDR2 SDRAM to easily implement an internal termination resistance (Rtt). ODT can be
configured for DQ[15:0], UDQS, LDQS, UDQS#, LDQS#, and UDM, and LDM signals. The ODT feature can be configured with the
Extended Mode Register Set (EMRS) command, and turned on or off using the ODT input signal. Before and after the EMRS is issued,
the ODT input must be received with respect to the timings of tAOFD, tMOD(max), tAOND; and the CKE input must be held HIGH
throughout the duration of tMOD(max).
The DDR2 SDRAM supports the ODT on and off functionality in Active, Standby, and Power Down modes, but not in Self Refresh
mode. ODT timing diagrams follow for Active/Standby mode and Power Down mode.
EMRS to ODT Update Delay
Integrated Silicon Solution, Inc. – www.issi.com –
Rev. 00B, 3/28/2011
Command
ODT
CK#
CK
tAOFD
~
~
~
Old Setting
EMRS
tMOD(Min)
NOP
tMOD(Max)
NOP
NOP
ODT Ready
tIS
NOP
tAOND
~
~
~
NOP
Updated
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