c8051f544 Silicon Laboratories, c8051f544 Datasheet - Page 138

• Manufacturer Part Number: c8051f544
• Description: Mixed Signal Isp Flash Mcu Family
• Manufacturer: Silicon Laboratories

C8051F54x
SFR Definition 17.2. OSCICN: Internal Oscillator Control
SFR Address = 0xA1; SFR Page = 0x0F;
138
Name
Reset
7:6 IOSCEN[1:0] Internal Oscillator Enable Bits.
2:0
Bit
Type
5
4
3
Bit
SUSPEND
Reserved
IFCN[2:0]
IFRDY
Name
R/W
7
1
IOSCEN[1:0]
00: Oscillator Disabled.
01: Reserved.
10: Reserved.
11: Oscillator enabled in normal mode and disabled in suspend mode.
Internal Oscillator Suspend Enable Bit.
Setting this bit to logic 1 places the internal oscillator in SUSPEND mode. The inter-
nal oscillator resumes operation when one of the SUSPEND mode awakening
events occurs.
Internal Oscillator Frequency Ready Flag.
0: Internal oscillator is not running at programmed frequency.
1: Internal oscillator is running at programmed frequency.
Read = 0b; Write = 0b.
Internal Oscillator Frequency Divider Control Bits.
000: SYSCLK derived from Internal Oscillator divided by 128.
001: SYSCLK derived from Internal Oscillator divided by 64.
010: SYSCLK derived from Internal Oscillator divided by 32.
011: SYSCLK derived from Internal Oscillator divided by 16.
100: SYSCLK derived from Internal Oscillator divided by 8.
101: SYSCLK derived from Internal Oscillator divided by 4.
110: SYSCLK derived from Internal Oscillator divided by 2.
111: SYSCLK derived from Internal Oscillator divided by 1.
R/W
6
1
SUSPEND
R/W
5
0
IFRDY
Rev. 1.0
R
4
1
Function
Reserved
R
3
0
2
0
IFCN[2:0]
R/W
1
0
0
0