c8051f544 Silicon Laboratories, c8051f544 Datasheet - Page 158

• Manufacturer Part Number: c8051f544
• Description: Mixed Signal Isp Flash Mcu Family
• Manufacturer: Silicon Laboratories

C8051F54x
SFR Definition 18.6. P1MASK: Port 1 Mask Register
SFR Address = 0xF4; SFR Page = 0x00
SFR Definition 18.7. P1MAT: Port 1 Match Register
SFR Address = 0xF3; SFR Page = 0x00
158
Name
Reset
Name
Reset
7:0
7:0
Bit
Bit
Type
Type
Bit
Bit
P1MASK[7:0]
P1MAT[7:0]
Name
Name
7
0
7
1
Port 1 Mask Value.
Selects P1 pins to be compared to the corresponding bits in P1MAT.
0: P1.n pin logic value is ignored and cannot cause a Port Mismatch event.
1: P1.n pin logic value is compared to P1MAT.n.
Port 1 Match Value.
Match comparison value used on Port 1 for bits in P1MAT which are set to 1.
0: P1.n pin logic value is compared with logic LOW.
1: P1.n pin logic value is compared with logic HIGH.
6
0
6
1
5
0
5
1
Rev. 1.0
4
P1MASK[7:0]
0
4
1
P1MAT[7:0]
R/W
R/W
Function
Function
3
0
3
1
2
0
2
1
1
0
1
1
0
0
0
1