c8051f544 Silicon Laboratories, c8051f544 Datasheet - Page 38

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c8051f544

Manufacturer Part Number
c8051f544
Description
Mixed Signal Isp Flash Mcu Family
Manufacturer
Silicon Laboratories
Datasheet

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C8051F54x
Gain Register Definition 5.1. ADC0GNH: ADC0 Selectable Gain High Byte
Indirect Address = 0x04;
Gain Register Definition 5.2. ADC0GNL: ADC0 Selectable Gain Low Byte
Indirect Address = 0x07;
38
Note: This register is accessed indirectly; See
Note: This register is accessed indirectly; See
Name
Reset
Name
Reset
7:0
7:4
3:0
Bit
Bit
Type
Type
Bit
Bit
GAINH[7:0] ADC0 Gain High Byte.
GAINL[3:0] ADC0 Gain Lower 4 Bits.
Reserved
Name
Name
7
1
7
0
See Section 5.3.1 for details on calculating the value for this register.
See Figure 5.3.1 for details for setting this register.
This register is only accessed indirectly through the ADC0H and ADC0L register.
Must Write 0000b
6
1
6
0
GAINL[3:0]
W
5
1
5
0
Section 5.3.2
Section 5.3.2
Rev. 1.0
4
1
4
0
GAINH[7:0]
W
for details for writing this register.
for details for writing this register.
Function
Function
Reserved
W
3
1
3
0
Reserved
W
2
1
2
0
Reserved
W
1
0
1
0
Reserved
W
0
0
0
0

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