c8051f544 Silicon Laboratories, c8051f544 Datasheet - Page 273

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c8051f544

Manufacturer Part Number
c8051f544
Description
Mixed Signal Isp Flash Mcu Family
Manufacturer
Silicon Laboratories
Datasheet

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D
Revision 0.1 to Revision 1.0
Note: All items from the C8051F54x Errata dated November 5th, 2009 are incorporated into this data sheet.
OCUMENT
Updated “2. Ordering Information” to include -A (Automotive) devices and automotive qualification
information.
Updated Figure 4.6.
Updated supply current related specifications throughout “6. Electrical Characteristics” .
Updated SFR Definition 7.1 (REF0CN) to change VREF high setting to 2.20 V from 2.25 V.
Updated Figure 8.1 to indicate that Comparators are powered from V
Updated the Gain Table in “5.3.1. Calculating the Gain Value” to fix the ADC0GNH Value in the last row.
Updated Table 10.1 with correct timing for all branch instructions, MOVC, and CPL A.
Updated Table 14.1 to indicate behavior when performing a Flash operation in reserved space.
Updated “14.1. Programming the Flash Memory” to clarify behavior of 8-bit MOVX instructions and
when writing/erasing Flash.
Updated SFR Definition 14.3 (FLSCL) to include FLEWT bit definition. This bit must be set before
writing or erasing Flash. Also updated Table 6.5 to reflect new Flash Write and Erase timing.
Updated “16.7. Flash Error Reset” with an additional cause of a Flash Error reset.
Updated “18.1.3. Interfacing Port I/O in a Multi-Voltage System” to remove note regarding interfacing to
voltages above VIO.
Updated “20. SMBus” to remove all hardware ACK features, including SMB0ADM and SMB0ADR
SFRs.
Updated SFR Definition 21.1(SCON0) to correct SFR Page to 0x00 from All Pages.
Updated CP Register Definition 24.2 with proper Device ID.
C
HANGE
L
IST
Rev. 1.0
IO
and not V
C8051F54x
DDA
.
273

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