cop8tab9 National Semiconductor Corporation, cop8tab9 Datasheet

cop8tab9

Manufacturer Part Number

cop8tab9

Description

8-bit Cmos Flash Microcontroller With 2k Byte Or 4k Byte Memory

Manufacturer

National Semiconductor Corporation

Datasheet

1.COP8TAB9.pdf (59 pages)

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COP8TAB9/TAC9

8-Bit CMOS Flash Microcontroller with 2k Byte or 4k

Byte Memory

1.0 General Description

The COP8TAB9/TAC9 Flash microcontrollers are highly in-

tegrated COP8

memory and advanced features. These single-chip CMOS

devices are suited for applications requiring a full featured,

in-system reprogrammable controller with moderate memory

and low EMI. The same device is used for development,

pre-production and volume production with a range of COP8

software and hardware development tools.

A Masked ROM device (COP8TAB5/TAC5) has been devel-

oped and provides identical features except for the Boot

ROM and Flash Memory and related features such as In-

2.0 Features

KEY FEATURES

n 2k bytes or 4k bytes Flash Program Memory, with

n 128 bytes volatile RAM

n 2.25V – 2.75V In-System Programmability of Flash

n High endurance - 20k Erase/Write Cycles

n Superior Data Retention - 100 years

n Crystal Oscillator at 15 MHz or Integrated RC Oscillator

n Clock Prescaler For Adjusting Power Dissipation to

n Power-On Reset

n HALT/IDLE Power Save Modes

n One 16-bit timer:

n High Current I/Os

OTHER FEATURES

n Single supply operation:

n Quiet Design (low radiated emissions)

n Multi-Input Wake-Up with optional interrupts

n MICROWIRE/PLUS (Serial Peripheral Interface

COP8

I 2 C

SMBus is a trademark of Intel Corporation.

Security Feature, organized in 512 byte pages that can

be erased or written individually

at 10MHz

Processing Requirements

— Processor Independent PWM mode

— External Event counter mode

— Input Capture mode

— 10 mA

— 2.25V–2.75V (−40˚C to +85˚C)

Compatible)

Device included in this datasheet:

is a registered trademark of Phillips Corporation.

COP8TAB9

COP8TAC9

is a registered trademark of National Semiconductor Corporation.

Device

™

0.4V

Feature core devices, with 2k or 4k Flash

Memory (kbytes)

Flash Program

DS200475

(bytes)

RAM

128

16, 24 or 40

Pins

I/O

System Programming and reprogrammability. The ROM de-

vice is supported, in emulation, by this device.

The lack of the Boot ROM and Flash Memory in the ROM

device, prompts us to caution the user, utilizing the

COP8TAx9 Flash based devices during development for

applications to be produced using the COP8TAx5 ROM de-

vices, to ensure that code contains NO calls to Boot ROM

functions prior to submission for ROM generation. Instances

of the JSRB instruction in ROM based devices will be ex-

ecuted as a JSR instruction to a location in the first 256 bytes

of Program Memory.

n ACCESS.Bus Synchronous Serial Interface (compatible

n Eight multi-source vectored interrupts servicing:

n Idle Timer with programmable interrupt interval

n 8-bit Stack Pointer SP (stack in RAM)

n Two 8-bit Register Indirect Data Memory Pointers

n True bit manipulation

n WATCHDOG and Clock Monitor logic

n Software selectable I/O options

n Schmitt trigger inputs on I/O ports

n Temperature range: –40˚C to +85˚C

n Packaging: 20 and 28 SOIC and 44 LLP

with I2C

— Master Mode and Slave Mode

— Full Master Mode Capability

— Bus Speed Up To 400KBits/Sec

— Low Power Mode With Wake-Up Detection

— Optional 1.8V ACCESS.Bus Compatibility

— External Interrupt

— Idle Timer T0

— One Timers (with 2 interrupts)

— MICROWIRE/PLUS Serial peripheral interface

— ACCESS.Bus/I

— Multi-Input Wake-Up

— Software Trap

— TRI-STATE Output/High Impedance Input

— Push-Pull Output

— Weak Pull Up Input

Serial Interface

20 and 28 SOIC WIDE,

44 LLP

™

and SMBus

Packages

C/SMBus compatible Synchronous

™

)

−40˚C to +85˚C

Temperature

February 2005

www.national.com

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