cop8tab9 National Semiconductor Corporation, cop8tab9 Datasheet - Page 15

• Manufacturer Part Number: cop8tab9
• Description: 8-bit Cmos Flash Microcontroller With 2k Byte Or 4k Byte Memory
• Manufacturer: National Semiconductor Corporation

9.0 Pin Descriptions
L5 Multi-Input Wake-Up
L4 Multi-Input Wake-Up
L3 Multi-Input Wake-Up
L2 Multi-Input Wake-Up (optional 1.8V compatible input)
L1 Multi-Input Wake-Up or ACCESS.Bus Serial Clock (op-
L0 Multi-Input Wake-Up or ACCESS.Bus Serial Data (op-
FIGURE 7. I/O Port Configurations — Output Mode
tional 1.8V compatible input)
tional 1.8V compatible input)
FIGURE 8. I/O Port Configurations — Input Mode
FIGURE 6. I/O Port Configurations
(Continued)
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9.1 EMULATION CONNECTION
Connection to the emulation system is made via a 2 x 7
connector which interrupts the continuity of the RESET, G0,
G1, G2 and G3 signals between the COP8 device and the
rest of the target system (as shown in Figure 9). This con-
nector can be designed into the production pc board and can
be replaced by jumpers or signal traces when emulation is
no longer necessary. The emulator will replicate all functions
of G0 - G3 and RESET. For proper operation, no connection
should be made on the device side of the emulator connec-
tor.
10.0 Functional Description
The architecture of the device is a modified Harvard archi-
tecture. With the Harvard architecture, the program memory
(Flash) is separate from the data store memory (RAM). Both
Program Memory and Data Memory have their own separate
addressing space with separate address buses. The archi-
tecture, though based on the Harvard architecture, permits
transfer of data from Flash Memory to RAM.
10.1 CPU REGISTERS
The CPU can do an 8-bit addition, subtraction, logical or shift
operation in one instruction (t
FIGURE 9. Emulation Connection
C
) cycle time.
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