cop8tab9 National Semiconductor Corporation, cop8tab9 Datasheet - Page 8

• Manufacturer Part Number: cop8tab9
• Description: 8-bit Cmos Flash Microcontroller With 2k Byte Or 4k Byte Memory
• Manufacturer: National Semiconductor Corporation

www.national.com
6.0 Architectural Overview
6.1 EMI REDUCTION
The COP8TAB9/TAC9 devices incorporate circuitry that
guards against electromagnetic interference - an increasing
problem in today’s microcontroller board designs. National’s
patented EMI reduction technology offers low EMI clock
circuitry, gradual turn-on output drivers (GTOs) and internal
Icc smoothing filters, to help circumvent many of the EMI
issues influencing embedded control designs. National has
achieved 15 dB–20 dB reduction in EMI transmissions when
designs have incorporated its patented EMI reducing cir-
cuitry.
6.2 IN-SYSTEM PROGRAMMING
The devices include a program in a boot ROM that provides
the capability, through the MICROWIRE/PLUS serial inter-
face, to erase, program and read the contents of the Flash
memory.
Additional routines are included in the boot ROM, which can
be called by the user program, to enable the user to custom-
ize in-system software update capability if MICROWIRE/
PLUS is not desired.
The contents of the boot ROM have been defined by Na-
tional. Execution of code from the boot ROM is dependent
on the state of the FLEX bit in the Option Register on exit
from RESET. If the FLEX bit is a zero, the Flash Memory is
assumed to be empty and execution from the boot ROM
begins.
6.3 TRUE IN-SYSTEM EMULATION
On-chip emulation capability has been added which allows
the user to perform true in-system emulation using final
production boards and devices. This simplifies testing and
evaluation of software in real environmental conditions. The
user, merely by providing for a standard connector which can
be bypassed by jumpers on the final application board, can
provide for software and hardware debugging using actual
production units.
6.4 ARCHITECTURE
The COP8 family is based on a modified Harvard architec-
ture, which allows data tables to be accessed directly from
program memory. This is very important with modern
microcontroller-based applications, since program memory
is usually ROM or EPROM, while data memory is usually
RAM. Consequently constant data tables need to be con-
tained in non-volatile memory, so they are not lost when the
microcontroller is powered down. In a modified Harvard ar-
chitecture, instruction fetch and memory data transfers can
be overlapped with a two stage pipeline, which allows the
next instruction to be fetched from program memory while
the current instruction is being executed using data memory.
This is not possible with a Von Neumann single-address bus
architecture.
The COP8 family supports a software stack scheme that
allows the user to incorporate many subroutine calls. This
capability is important when using High Level Languages.
With a hardware stack, the user is limited to a small fixed
number of stack levels.
6.5 INSTRUCTION SET
In today’s 8-bit microcontroller application arena cost/
performance, flexibility and time to market are several of the
key issues that system designers face in attempting to build
8
well-engineered products that compete in the marketplace.
Many of these issues can be addressed through the manner
in which a microcontroller’s instruction set handles process-
ing tasks. And that’s why the COP8 family offers a unique
and code-efficient instruction set - one that provides the
flexibility, functionality, reduced costs and faster time to mar-
ket that today’s microcontroller based products require.
Code efficiency is important because it enables designers to
pack more on-chip functionality into less program memory
space (ROM, OTP or Flash). Selecting a microcontroller with
less program memory size translates into lower system
costs, and the added security of knowing that more code can
be packed into the available program memory space.
6.5.1 Key Instruction Set Features
The COP8 family incorporates a unique combination of in-
struction set features, which provide designers with optimum
code efficiency and program memory utilization.
6.5.2 Single Byte/Single Cycle Code Execution
The efficiency is due to the fact that the majority of instruc-
tions are of the single byte variety, resulting in minimum
program space. Because compact code does not occupy a
substantial amount of program memory space, designers
can integrate additional features and functionality into the
microcontroller program memory space. Also, the majority
instructions executed by the device are single cycle, result-
ing in minimum program execution time. In fact, 77% of the
instructions are single byte single cycle, providing greater
code and I/O efficiency, and faster code execution.
6.5.3 Many Single-Byte, Multi-Function Instructions
The COP8 instruction set utilizes many single-byte, multi-
function instructions. This enables a single instruction to
accomplish multiple functions, such as DRSZ, DCOR, JID,
LD (Load) and X (Exchange) instructions with post-
incrementing and post-decrementing, to name just a few
examples. In many cases, the instruction set can simulta-
neously execute as many as three functions with the same
single-byte instruction.
JID: (Jump Indirect); Single byte instruction decodes exter-
nal events and jumps to corresponding service routines
(analogous to “DO CASE” statements in higher level lan-
guages).
LAID: (Load Accumulator-Indirect); Single byte look up table
instruction provides efficient data path from the program
memory to the CPU. This instruction can be used for table
lookup and to read the entire program memory for checksum
calculations.
RETSK: (Return Skip); Single byte instruction allows return
from subroutine and skips next instruction. Decision to
branch can be made in the subroutine itself, saving code.
AUTOINC/DEC: (Auto-Increment/Auto-Decrement); These
instructions use the two memory pointers B and X to effi-
ciently process a block of data (simplifying “FOR NEXT” or
other loop structures in higher level languages).
6.5.4 Bit-Level Control
Bit-level control over many of the microcontroller’s I/O ports
provides a flexible means to ease layout concerns and save
board space. All members of the COP8 family provide the
ability to set, reset and test any individual bit in the data
memory address space, including memory-mapped I/O ports
and associated registers.