x4c105 Intersil Corporation, x4c105 Datasheet - Page 3

• Manufacturer Part Number: x4c105
• Description: Cpu Supervisor With Novram And Output Ports
• Manufacturer: Intersil Corporation

Capacitor Backup Circuit
The diagram in Figure 1 shows a representation of the capacitor backup circuit.
Figure 1.
SERIAL INTERFACE
Serial Interface Conventions
The device supports a bidirectional bus oriented proto-
col. The protocol defines any device that sends data
onto the bus as a transmitter, and the receiving device
as the receiver. The device controlling the transfer is
called the master and the device being controlled is
called the slave. The master always initiates data
Figure 2. Valid Data Changes on the SDA Bus
V
SCL
SDA
CC
V
HIGH when
LOW when
CC
<V
> V
TRIP
TRIP
-0.2V
3
Data Stable
AUTOSTORE
NOVRAM
Voltage Supply
Start
To Internal
X4C105
Data Change
V
TRIP
transfers, and provides the clock for both transmit and
receive operations. Therefore, the devices in this fam-
ily operate as slaves in all applications.
Serial Clock and Data
Data states on the SDA line can change only during
SCL LOW. SDA state changes during SCL HIGH are
reserved for indicating start and stop conditions. See
Figure 2.
Data Stable
CAP
V
CC
March 18, 2005
FN8124.0