xr16m698 Exar Corporation, xr16m698 Datasheet - Page 10

• Manufacturer Part Number: xr16m698
• Description: 1.62v To 3.63v High Performance Octal Uart With 32-byte Fifo
• Manufacturer: Exar Corporation

XR16M698
1.62V TO 3.63V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO
The closest divisor that is obtainable in the 698 can be calculated using the following formula:
In the formulas above, please note that:
TRUNC (N) = Integer Part of N. For example, TRUNC (5.6) = 5.
ROUND (N) = N rounded towards the closest integer. For example, ROUND (7.3) = 7 and ROUND (9.9) = 10.
A >> B indicates right shifting the value ’A’ by ’B’ number of bits. For example, 0x78A3 >> 8 = 0x0078.
F
IGURE
ROUND( (Required Divisor - TRUNC(Required Divisor) )*16)/16 + TRUNC(Required Divisor), where
8XMODE [7:0] = 0
4XMODE [7:0] = 0
8XMODE [7:0] = 0
4XMODE [7:0] = 0
8XMODE [7:0] = 0
4XMODE [7:0] = 0
8XMODE [7:0] = 0
4XMODE [7:0] = 0
4. B
AUD
XTAL1
XTAL2
R
X
X
X
X
X
X
X
X
ATE
00
00
FF
00
00
FF
FF
FF
G
ENERATOR
DLD = ROUND( (Required Divisor-TRUNC(Required Divisor) )*16)
Required Divisor (decimal) = (XTAL1 clock frequency / prescaler) / (serial data rate x 16)
Required Divisor (decimal) = (XTAL1 clock frequency / prescaler / (serial data rate x 8)
Required Divisor (decimal) = (XTAL1 clock frequency / prescaler / (serial data rate x 4)
Reserved.
Crystal
Buffer
Osc/
Channels
To Other
DLL = TRUNC(Required Divisor) & 0xFF
DLM = TRUNC(Required Divisor) >> 8
Divide by 4
Divide by 1
Prescaler
Prescaler
10
MCR Bit-7=0
MCR Bit-7=1
(default)
DLL, DLM and DLD
Fractional Baud
Rate Generator
Logic
Registers
16X or 8X or 4X
and Receiver
to Transmitter
Rate Clock
Sampling
REV. 1.0.0