hys64t128020hm-5-a Infineon Technologies Corporation, hys64t128020hm-5-a Datasheet - Page 23

• Manufacturer Part Number: hys64t128020hm-5-a
• Description: 214-pin Micro-dimm-ddr2-sdram Modules
• Manufacturer: Infineon Technologies Corporation

3.4
Table 15
Parameter
Operating Current 0
One bank Active - Precharge;
between valid commands. Address and control inputs are SWITCHING, Databus inputs are
SWITCHING.
Operating Current 1
One bank Active - Read - Precharge;
t
control inputs are SWITCHING, Databus inputs are SWITCHING.
Precharge Standby Current
All banks idle; CS is HIGH; CKE is HIGH;
SWITCHING, Data bus inputs are SWITCHING.
Precharge Power-Down Current
Other control and address inputs are STABLE, Data bus inputs are FLOATING.
Precharge Quiet Standby Current
All banks idle; CS is HIGH; CKE is HIGH;
Data bus inputs are FLOATING.
Active Standby Current
Burst Read: All banks open; Continuous burst reads; BL = 4; AL = 0, CL = CL
t
SWITCHING; Data Bus inputs are SWITCHING;
Active Power-Down Current
All banks open;
inputs are FLOATING. MRS A12 bit is set to LOW (Fast Power-down Exit);
Active Power-Down Current
All banks open; t
inputs are FLOATING. MRS A12 bit is set to HIGH (Slow Power-down Exit);
Operating Current
urst Write: All banks open; Continuous burst writes; BL = 4; AL = 0, CL = CL
t
SWITCHING; Data Bus inputs are SWITCHING;
Burst Refresh Current
t
commands, Other control and address inputs are SWITCHING, Data bus inputs are SWITCHING.
Distributed Refresh Current
t
commands, Other control and address inputs are SWITCHING, Data bus inputs are SWITCHING.
Data Sheet
RCD
RAS
RAS
CK
CK
=
=
=
=
=
t
t
CK.MIN
CK.MIN.
t
t
t
RAS.MAX.
RAS.MAX
RCD.MIN
., Refresh command every
, Refresh command every
I
I
DD
, AL = 0, CL = CL
,
DD
,
t
t
RP
t
RP
Measurement Conditions
CK
CK
Specifications and Conditions
=
=
=
=
t
t
RP.MIN
RP.MAX
t
t
CK.MIN
CK.MIN
; CKE is HIGH, CS is HIGH between valid commands. Address inputs are
; CKE is HIGH, CS is HIGH between valid commands. Address inputs are
, CKE is LOW; Other control and address inputs are STABLE, Data bus
, CKE is LOW; Other control and address inputs are STABLE, Data bus
t
MIN
CK
; CKE is HIGH, CS is HIGH between valid commands. Address and
=
t
CK.MIN
t
I
t
RFC
RFC
OUT
t
CK
,
=
t
=
= 0 mA, BL = 4,
CK
t
t
RC
t
1)2)3)4)5)6)
=
REFI
RFC.MIN
=
t
=
CK.MIN
t
CK.MIN
interval, CKE is LOW and CS is HIGH between valid
t
I
RC.MIN
OUT
interval, CKE is HIGH, CS is HIGH between valid
; Other control and address inputs are STABLE,
; Other control and address inputs are
= 0 mA.
,
23
t
RAS
t
CK
=
=
t
RAS.MIN
t
CK.MIN
Micro-DIMM DDR2 SDRAM Modules
, CKE is HIGH, CS is HIGH
,
t
RC
=
HYS64T128020HM–[3.7/5]–A
MIN
t
MIN
RC.MIN
;
t
;
CK
t
CK
,
=
t
=
RAS
Electrical Characteristics
t
CK.MIN
t
CK.MIN
=
04132004-S0LP-CL4Q
t
RAS.MIN
;
;
Rev. 1.2, 2005-08
,
Symbol
I
I
I
I
I
I
I
I
I
I
I
DD0
DD1
DD2N
DD2P
DD2Q
DD3N
DD3P(0)
DD3P(1)
DD4W
DD5B
DD5D