gs881z36bgd-333i GSI Technology, gs881z36bgd-333i Datasheet - Page 14

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gs881z36bgd-333i

Manufacturer Part Number
gs881z36bgd-333i
Description
9mb Pipelined And Flow Through Synchronous Nbt Sram
Manufacturer
GSI Technology
Datasheet
Rev: 1.06 3/2007
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Key
Current State (n)
Clock (CK)
Command
Intermediate
ƒ
Current State and Next State Definition for
Transition
Input Command Code
Intermediate State (N+1)
High Z
(Data In)
B W
Current State
n
D
R
Pipeline Mode Data I/O State Diagram
Transition
ƒ
Intermediate
Next State (n+2)
14/39
n+1
B
Intermediate
Intermediate
Intermediate
D
GS881Z18B(T/D)/GS881Z32B(T/D)/GS881Z36B(T/D)
W
State
High Z
ƒ
R
Pipeline Mode Data I/O State Diagram
Intermediate
Notes:
1. The Hold command (CKE Low) is not
2. W, R, B, and D represent input command
codes as indicated in the Truth Tables.
shown because it prevents any state change.
n+2
Next State
W
ƒ
D
Data Out
(Q Valid)
R
n+3
B
Intermediate
ƒ
© 2002, GSI Technology

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