gs881z36bgd-333i GSI Technology, gs881z36bgd-333i Datasheet - Page 5

• Manufacturer Part Number: gs881z36bgd-333i
• Description: 9mb Pipelined And Flow Through Synchronous Nbt Sram
• Manufacturer: GSI Technology

100-Pin TQFP Pin Descriptions
Rev: 1.06 3/2007
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Symbol
DQP
DQP
A
DQP
DQP
V
ADV
CKE
DQ
DQ
DQ
DQ
LBO
V
V
CK
NC
0
ZZ
B
B
B
B
E
E
E
FT
DDQ
W
G
A
, A
DD
SS
A
B
C
D
1
2
3
C
D
A
B
A
B
C
D
1
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
Chip Enable—Active High. For self decoded depth expansion
Chip Enable—Active Low. For self decoded depth expansion
5/39
Advance/Load; Burst address counter control pin
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Burst Address Inputs; Preload the burst counter
Pipeline/Flow Through Mode Control; active low
GS881Z18B(T/D)/GS881Z32B(T/D)/GS881Z36B(T/D)
Clock Input Buffer Enable; active low
Byte A Data Input and Output pins
Byte B Data Input and Output pins
Byte C Data Input and Output pins
Byte D Data Input and Output pins
Power down control; active high
Linear Burst Order; active low.
Output driver power supply
Output Enable; active low
Write Enable; active low
9th Data I/O Pin; Byte A
9th Data I/O Pin; Byte B
9th Data I/O Pin; Byte C
9th Data I/O Pin; Byte D
Chip Enable; active low
Core power supply
Clock Input Signal
Description
Address Inputs
No Connect
Ground
C
D
A
B
; active low
; active low
; active low
; active low
© 2002, GSI Technology