gs881z36bgd-333i GSI Technology, gs881z36bgd-333i Datasheet - Page 9

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gs881z36bgd-333i

Manufacturer Part Number
gs881z36bgd-333i
Description
9mb Pipelined And Flow Through Synchronous Nbt Sram
Manufacturer
GSI Technology
Datasheet
Rev: 1.06 3/2007
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS881Z18/32/36D 165-Bump BGA Pin Description
Symbol
A
DQP
DQP
DQP
DQP
V
MCH
CKE
ADV
TMS
TDO
DNU
DQ
DQ
DQ
DQ
LBO
TCK
V
TDI
V
0
NC
CK
B
B
ZZ
B
B
E
E
E
FT
DDQ
W
G
A
, A
DD
SS
C
D
A
B
1
3
2
A
B
C
D
A
B
C
D
1
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
In
In
In
In
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
9/39
Address field LSBs and Address Counter Preset Inputs
Burst address counter advance enable; active high
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
GS881Z18B(T/D)/GS881Z32B(T/D)/GS881Z36B(T/D)
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
Byte A Data Input and Output pins
Byte B Data Input and Output pins
Byte C Data Input and Output pins
Byte D Data Input and Output pins
Sleep mode control; active high
Clock Input Signal; active high
Output driver power supply
Output Enable; active low
Clock Enable; active low
Chip Enable; active high
9th Data I/O Pin; Byte C
9th Data I/O Pin; Byte D
Write Enable; active low
9th Data I/O Pin; Byte A
9th Data I/O Pin; Byte B
Chip Enable; active low
Chip Enable; active low
Scan Test Mode Select
I/O and Core Ground
Scan Test Data Out
Must Connect High
Core power supply
Scan Test Data In
Scan Test Clock
Address Inputs
Description
No Connect
Do Not Use
A
B
C
D
; active low
; active low
; active low
; active low
© 2002, GSI Technology

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