saa5547ps NXP Semiconductors, saa5547ps Datasheet - Page 65

• Manufacturer Part Number: saa5547ps
• Description: Saa550x; Saa554x Tv Microcontrollers With Closed Captioning Cc And On-screen Display Osd
• Manufacturer: NXP Semiconductors

Philips Semiconductors
18.11 Display synchronization
The horizontal and vertical synchronizing signals from the
TV deflection are used as inputs. Both signals can be
inverted before being delivered to the Phase Selector
section.
CC: The polarity is controlled using either VPOL or HPOL
bits in the MMR Text Position Vertical.
TXT: The TXT1.H POLARITY and TXT1.V POLARITY bits
control the polarity.
A line locked 12 MHz clock is derived from the 12 MHz free
running oscillator by the Phase Selector. This line locked
clock is used to clock the whole of the Display block.
The horizontal and vertical sync signals are synchronized
with the 12 MHz clock before being used in the display
section.
18.12 Video/Data switch (Fast Blanking) polarity
The polarity of the video/data (Fast Blanking) signal can be
inverted. The polarity is set with the VDSPOL bit in the
MMR RGB Brightness.
Table 24 Fast blanking signal polarity
18.13 Video/data switch adjustment
To take into account the delay between the RGB values
and the VDS signal due to external buffering, the
VDS signal can be moved in relation to the RGB signals.
The VDS signal can be set to be either a clock cycle before
or after the RGB signal, or coincident with the RGB signal.
This is done using VDEL<2:0> in the MMR Configuration.
18.14 RGB brightness control
A brightness control is provided to allow the RGB upper
output voltage level to be modified. The nominal value is
1 V into a 150
0.7 V and 1.2 V.
The brightness is set in MMR RGB Brightness.
2000 Feb 23
VDSPOL
TV microcontrollers with Closed Captioning (CC)
and On-Screen Display (OSD)
0
0
1
1
resistor, but can be varied between
VDS
1
0
0
1
RGB display
Video display
RGB display
Video display
CONDITION
65
Table 25 RGB brightness
18.15 Contrast reduction
CC: This feature is not available in CC mode.
TXT: The COR bits in SFRs TXT5 and TXT6 control when
the COR output of the device is activated (i.e. pulled
LOW). This output is intended to act on the TV’s display
circuits to reduce contrast of the video when it is active.
The result of contrast reduction is to improve the
readability of the text in a mixed teletext and video display.
The bits in the TXT5 and TXT6 SFRs allow the display to
be set up so that, for example, the areas inside teletext
boxes will be contrast reduced when a subtitle is being
displayed but that the rest of the screen will be displayed
as normal video.
19 MEMORY MAPPED REGISTERS (MMR)
The memory mapped registers are used to control the
display. The registers are mapped into the microcontroller
MOVX address space, starting at address 87F0H and
extending to 87FFH.
Table 26 MMR address summary
REGISTER
NUMBER
BRI3 TO BRI0
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
0000
1111
...
ADDRESS
MEMORY
87FBH
87FCH
87FDH
87FEH
87F0H
87F1H
87F2H
87F3H
87F4H
87F5H
87F6H
87F7H
87F8H
87F9H
87FAH
87FFH
lowest value
...
highest value
RGB BRIGHTNESS
Preliminary specification
Display Control
Text Position Vertical
Text Area Start
Fringing Control
Text Area End
Scroll Area
Scroll Range
RGB Brightness
Status
reserved
reserved
reserved
HSYNC Delay
VSYNC Sync Delay
Top Scroll Line
Configuration
FUNCTION
SAA55xx