LM9801CCV NSC [National Semiconductor], LM9801CCV Datasheet - Page 15

• Manufacturer Part Number: LM9801CCV
• Description: Greyscale/24-Bit Color Linear CCD Sensor Processor
• Manufacturer: NSC [National Semiconductor]

RS Pulse Polarity
A2
RS Pulse Width
0
0
0
0
1
1
1
1
Note t
Parameter
(t
RSWIDTH
MODE
A1
MCLK
0
0
1
1
0
0
1
1
e
A0
)
0
1
0
1
0
1
0
1
1 f
MCLK
Offset DAC
Even Odd
PGA Gain
PGASRC
Standard
MODE
Mode or
SIGPOL
Polarity
Source
e
Enable
GAIN7
MODE
Signal
RS1
VOS3
Mode
BLL7
MSB
SR3
0
1
0
0
1
1
D7
1EN
1 MCLK period Examples given in parenthesis are for f
1
RSPOL
0
1
(Maximum Register Value is 14)
RS0
Sample Reference Position
Offset DAC
Offset DAC
0
1
0
1
ODSIGN
Enable
GAIN6
RSW1
VOS2
BLS6
BLL6
SR2
Sign
D6
2EN
TABLE I Configuration Register Address Table
2
TABLE II Configuration Register Parameters
Pulse
Width
RS
Offset DAC
Optical Black Pixels (Minimum Register Value is 1)
Enable
GAIN5
Power-
RSW0
RSEN
VOS1
BLS5
down
BLL5
SR1
RS
PD
D5
Control Bits
Dummy Pixels (Minimum Register Value is 2)
15
PGA Gain Coefficient
Offset DAC
OFFADD
Polarity
RSPOL
Enable
GAIN4
TREN
Offset
VOS0
Pulse
BLS4
BLL4
SR0
LSB
Add
MCLK
RS
D4
TR
e
20 MHz (t
VGA Gain
RSPOS3
GAIN3
TRW1
VGA3
BLS3
BLL3
MSB
SS3
D3
TR Pulse Width
Even Odd CCD ( frequency
MCLK
0
Standard CCD ( frequency
e
50 ns)
RSPOS2
Sample Signal Position
GAIN2
TRW0
VGA2
BLS2
BLL2
VGA
Gain
SS2
D2
RS Pulse Position
0
Test Modes
Guardband
RSPOS1
TRGRD
TR – 1
GAIN1
VGA1
BLS1
BLL1
VGA
Gain
SS1
D1
0
http
e
e
2 t
3 t
4 t
1 t
f
f
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
www national com
Result
VGA Gain
RSPOS0
RS
RS
Polarity
TRPOL
GAIN0
VGA0
BLS0
BLL0
(100 ns)
(150 ns)
(200 ns)
8)
16)
(50 ns)
SS0
LSB
D0
TR
0