LM9801CCV NSC [National Semiconductor], LM9801CCV Datasheet - Page 27

• Manufacturer Part Number: LM9801CCV
• Description: Greyscale/24-Bit Color Linear CCD Sensor Processor
• Manufacturer: NSC [National Semiconductor]

Applications Information
6 0 POWER SUPPLY CONSIDERATIONS
6 1 General
The LM9801 should be powered by a single
(unless 3V-compatible digital I O is required see Section
6 2) The analog supplies (V
and V
bypassing for each supply input They should not be pow-
ered by two or more different supplies
In systems with separate analog and digital
all the supply pins of the LM9801 should be powered by the
analog
to its respective ground with a 0 1 F capacitor located as
close as possible to the supply input pin A single 10
tantalum capacitor should be placed near the V
to provide low frequency bypassing
To minimize noise keep the LM9801 and all analog compo-
nents as far as possible from noise generators such as
switching power supplies and high frequency digital busses
If possible isolate all the analog components and signals
(OS reference inputs and outputs V
ground plane separate from the digital ground plane The
two ground planes should be tied together at a single point
preferably the point where the power supply enters the PCB
6 2 3V Compatible Digital I O
If 3V digital I O operation is desired the V
powered by a separate 3V
In this case all the digital I O pins (CD0–CD7 CCLK
MCLK DD0–DD7 EOC RD SYNC CS SCLK SDO and
SDI) will be 3V compatible The CCD clock signals ( 1
RS and TR) remain 5V outputs powered by V
the V
parallel combination of a 0 1 F capacitor and a 10 F tan-
talum capacitor
D(I O)
D(I O)
a
5V supply Each supply input should be bypassed
) are brought out individually to allow separate
input should be bypassed to DGND
g
A
) and the digital supplies (V
10% or 3 3V
A
FIGURE 12 Parallel Output CCD Application Circuit
AGND) on an analog
D(I O)
(Continued)
g
a
D
a
10% supply
5V supplies
A
In this case
(I O)
pin may be
5V source
supply pin
with a
2
D
F
27
Figure 12 is an example of how to use a single LM9801 with
6 3 Power Down Mode
Setting the Power Down bit to a ‘‘1’’ puts the device in a low
power standby mode The CCD outputs ( 1
TR) are pulled low and the analog sections are turned off to
conserve power The digital logic will continue to operate if
MCLK continues and SYNC is held high so for minimum
power dissipation MCLK should be stopped when the
LM9801 enters the Power Down mode Recovery from Pow-
er Down typically takes 50
reference voltages to settle to 0 5 LSB accuracy)
7 0 COLOR
There are two primary ways to use the LM9801 in a color
system with a triple output (RGB) CCD The first is to use
one LM9801 with an external multiplexer This is the sim-
plest solution The second technique is to use one LM9801
per RGB color
7 1 Parallel Output CCD One LM9801
a triple-output RGB CCD In this case an entire line of red is
digitized followed by an entire line of green then blue This
solution provides a 2 5 Mpixels sec (for an effective 830k
RGB pixels sec after de-interleaving) pixel rate using a high
performance triple output color CCD
The Mux 1 multiplexer located between the CCD’s OS out-
puts and the LM9801’s OS input selects the color to be
digitized according to the states of the A and B inputs (de-
scribed below) The multiplexer’s speed requirements are
minimal because the mux switches at the line rate not the
pixel rate Also since the output of the mux goes into a high
impedance low-capacitance input the ON resistance of the
mux is not critical The 74HC4052 is a good choice for this
application
s (the time required for the
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2 RS and