74LVT2244MTC_08 FAIRCHILD [Fairchild Semiconductor], 74LVT2244MTC_08 Datasheet

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74LVT2244MTC_08

Manufacturer Part Number
74LVT2244MTC_08
Description
Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs and 25
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
1.74LVT2244MTC_08.pdf (9 pages)
©1999 Fairchild Semiconductor Corporation
74LVT2244, 74LVTH2244 Rev. 1.5.0
74LVT2244, 74LVTH2244
Low Voltage Octal Buffer/Line Driver with 3-STATE
Outputs and 25
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
74LVT2244WM
74LVT2244SJ
74LVT2244MTC
74LVTH2244WM
74LVTH2244SJ
74LVTH2244MTC
Input and output interface capability to systems at
5V V
Equivalent 25 -Series resistors on outputs
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH2244),
also available without bushold feature (74LVT2244)
Live insertion/extraction permitted
Power Up/Down high impedance provides glitch-free
bus loading
Outputs source/sink –12mA/+12mA
Latch-up performance exceeds 500mA
ESD performance:
– Human-body model
– Machine model
– Charged-device model
Order Number
All packages are lead free per JEDEC: J-STD-020B standard.
CC
200V
Package
Number
MTC20
MTC20
M20B
M20D
M20B
M20D
2000V
1000V
Series Resistors in the Outputs
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
General Description
The LVT2244 and LVTH2244 are octal buffers and line
drivers designed to be employed as memory address
drivers, clock drivers and bus oriented transmitters or
receivers which provides improved PC board density.
The equivalent 25 -Series resistors helps reduce output
overshoot and undershoot.
The LVTH2244 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These octal buffers and line drivers are designed for low-
voltage (3.3V) V
provide a TTL interface to a 5V environment. The
LVT2244 and LVTH2244 are fabricated with an
advanced BiCMOS technology to achieve high speed
operation similar to 5V ABT while maintaining low power
dissipation.
Package Description
CC
applications, but with the capability to
February 2008
www.fairchildsemi.com

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74LVT2244MTC_08 Summary of contents

Page 1

Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs and 25 Features Input and output interface capability to systems Equivalent 25 -Series resistors on outputs Bushold data inputs eliminate the need for external pull-up resistors ...

Page 2

Connection Diagram Pin Description Pin Names Description 3-STATE Output Enable Inputs –I Inputs –O Outputs 0 7 ©1999 Fairchild Semiconductor Corporation 74LVT2244, 74LVTH2244 Rev. 1.5.0 Logic Symbol IEEE/IEC Truth Tables Inputs ...

Page 3

Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure ...

Page 4

DC Electrical Characteristics Symbol Parameter V Input Clamp Diode Voltage IK V Input HIGH Voltage IH V Input LOW Voltage IL V Output HIGH Voltage OH V Output LOW Voltage OL (3) I Bushold Input Minimum Drive I(HOLD) (3) I ...

Page 5

Dynamic Switching Characteristics Symbol Parameter V Quiet Output Maximum OLP Dynamic Quiet Output Minimum OLV Dynamic V OL Notes: 7. Characterized in SOIC package. Guaranteed parameter, but not tested. 8. Max number of outputs defined as (n). ...

Page 6

Physical Dimensions 20 B 10.65 7.60 10.00 7.40 1 0.51 PIN ONE 0.35 INDICATOR 2.65 MAX 0.75 0.25 (R0.10) (R0.10) 8° 0° 1.27 0.40 SEATING PLANE (1.40) DETAIL A SCALE: 2:1 Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC ...

Page 7

Physical Dimensions (Continued) Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or ...

Page 8

Physical Dimensions (Continued) Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision ...

Page 9

TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ ...

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