MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 158

• Manufacturer Part Number: MC68HC908JK3EMP
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Input/Output (I/O) Ports
12.3.3 Port A Input Pull-up Enable Register (PTAPUE)
Technical Data
158
Address:
When DDRAx is a logic 1, reading address $0000 reads the PTAx data
latch. When DDRAx is a logic 0, reading address $0000 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
The port A input pull-up enable register (PTAPUE) contains a software
configurable pull-up device for each of the seven port A pins. Each bit is
individually configurable and requires the corresponding data direction
register, DDRAx be configured as input. Each pull-up device is
automatically and dynamically disabled when its corresponding DDRAx
bit is configured as output.
PTA6EN — Enable PTA6 on OSC2
PTAPUE[6:0] — Port A Input Pull-up Enable Bits
Reset:
Read:
Write:
This read/write bit configures the OSC2 pin function when RC
oscillator option is selected. This bit has no effect for X-tal oscillator
option.
These read/write bits are software programmable to enable pull-up
devices on port A pins
Figure 12-5. Port A Input Pull-up Enable Register (PTAPUE)
1 = OSC2 pin configured for PTA6 I/O, and has all the interrupt and
0 = OSC2 pin outputs the RC oscillator clock (RCCLK)
1 = Corresponding port A pin configured to have internal pull-up if
0 = Pull-up device is disconnected on the corresponding port A pin
PTA6EN PTAPUE6 PTAPUE5 PTAPUE4 PTAPUE3 PTAPUE2 PTAPUE1 PTAPUE0
$000D
Bit 7
pull-up functions
its DDRA bit is set to 0
regardless of the state of its DDRA bit
0
Input/Output (I/O) Ports
6
0
5
0
4
0
MC68H(R)C908JL3E/JK3E/JK1E
3
0
2
0
1
0
MOTOROLA
—
Rev. 2.0
Bit 0
0