MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 91

• Manufacturer Part Number: MC68HC908JK3EMP
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

7.6.1.2 SWI Instruction
7.6.2 Interrupt Status Registers
MC68H(R)C908JL3E/JK3E/JK1E
MOTOROLA
Notes:
1. The I bit in the condition code register is a global mask for all interrupts sources except the SWI instruction.
Priority
Highest
Lowest
Reset
SWI Instruction
IRQ1 Pin
Timer Channel 0 Interrupt
Timer Channel 1 Interrupt
Timer Overflow Interrupt
Keyboard Interrupt
ADC Conversion Complete Interrupt
NOTE:
The SWI instruction is a non-maskable instruction that causes an
interrupt regardless of the state of the interrupt mask (I bit) in the
condition code register.
A software interrupt pushes PC onto the stack. A software interrupt does
not push PC – 1, as a hardware interrupt does.
The flags in the interrupt status registers identify maskable interrupt
sources.
status register flags that they set. The interrupt status registers can be
useful for debugging.
Source
—
Rev. 2.0
Table 7-3. Interrupt Sources
Table 7-3
System Integration Module (SIM)
summarizes the interrupt sources and the interrupt
COCO
IRQF1
CH0F
CH1F
KEYF
Flag
TOF
—
—
Mask
IMASKK
IMASK1
CH0IE
CH1IE
TOIE
AIEN
—
—
1(1)
System Integration Module (SIM)
Register
Flag
IF14
IF15
INT
IF1
IF3
IF4
IF5
—
—
Vector Address
Exception Control
$FFFC–$FFFD
$FFDE–$FFDF
$FFFE–$FFFF
$FFFA–$FFFB
$FFE0–$FFE1
$FFF6–$FFF7
$FFF4–$FFF5
$FFF2–$FFF3
Technical Data
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