MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 93

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MC68HC908JK3EMP

Manufacturer Part Number
MC68HC908JK3EMP
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
7.6.2.3 Interrupt Status Register 3
7.6.3 Reset
7.6.4 Break Interrupts
MC68H(R)C908JL3E/JK3E/JK1E
MOTOROLA
Address:
IF15 — Interrupt Flags
Bit 1 to 7 — Always read 0
All reset sources always have equal and highest priority and cannot be
arbitrated.
The break module can stop normal program flow at a software-
programmable break point by asserting its break interrupt output. (See
Section 17. Break Module
break state by forcing it to the SWI vector location. Refer to the break
interrupt subsection of each module to see how each module is affected
by the break state.
Reset:
Read:
Write:
These flags indicate the presence of interrupt requests from the
sources shown in
1 = Interrupt request present
0 = No interrupt request present
Rev. 2.0
$FE06
Bit 7
R
R
0
0
System Integration Module (SIM)
Figure 7-14. Interrupt Status Register 3 (INT3)
= Reserved
R
6
0
0
Table
R
5
0
0
7-3.
(BREAK).) The SIM puts the CPU into the
R
4
0
0
R
3
0
0
System Integration Module (SIM)
R
2
0
0
Exception Control
R
1
0
0
Technical Data
Bit 0
IF15
R
0
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