MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 196

• Manufacturer Part Number: MC68HC908JK3EMP
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Break Module (BREAK)
17.5.4 Break Flag Control Register (BFCR)
17.6 Low-Power Modes
17.6.1 Wait Mode
17.6.2 Stop Mode
Technical Data
196
Reset:
Read:
Write:
The break control register contains a bit that enables software to clear
status bits while the MCU is in a break state.
BCFE — Break Clear Flag Enable Bit
The WAIT and STOP instructions put the MCU in low-power-
consumption standby modes.
If enabled, the break module is active in wait mode. In the break routine,
the user can subtract one from the return address on the stack if SBSW
is set (see
zero to it.
A break interrupt causes exit from stop mode and sets the SBSW bit in
the break status register. See
This read/write bit enables software to clear status bits by accessing
status registers while the MCU is in a break state. To clear status bits
during the break state, the BCFE bit must be set.
Address:
1 = Status bits clearable during break
0 = Status bits not clearable during break
BCFE
Bit 7
R
0
Figure 17-7. Break Flag Control Register (BFCR)
7.7 Low-Power
= Reserved
$FE03
Break Module (BREAK)
R
6
R
5
Modes). Clear the SBSW bit by writing logic
7.8 SIM
R
4
MC68H(R)C908JL3E/JK3E/JK1E
Registers.
R
3
R
2
R
1
MOTOROLA
—
Rev. 2.0
Bit 0
R