MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 181

• Manufacturer Part Number: MC68HC908JK3EMP
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

15.4 I/O Signals
15.4.1 2OSCOUT
15.4.2 COPCTL Write
15.4.3 Power-On Reset
15.4.4 Internal Reset
MC68H(R)C908JL3E/JK3E/JK1E
MOTOROLA
NOTE:
NOTE:
Service the COP immediately after reset and before entering or after
exiting stop mode to guarantee the maximum time before the first COP
counter overflow.
A COP reset pulls the RST pin low for 32 × 2OSCOUT cycles and sets
the COP bit in the reset status register (RSR). (See
Register
Place COP clearing instructions in the main program and not in an
interrupt subroutine. Such an interrupt subroutine could keep the COP
from generating a reset even while the main program is not working
properly.
The following paragraphs describe the signals shown in
2OSCOUT is the oscillator output signal. 2OSCOUT frequency is equal
to the crystal frequency or the RC-oscillator frequency.
Writing any value to the COP control register (COPCTL) (see
Control
of the SIM counter. Reading the COP control register returns the low
byte of the reset vector.
The power-on reset (POR) circuit in the SIM clears the SIM counter
4096 × 2OSCOUT cycles after power-up.
An internal reset clears the SIM counter and the COP counter.
—
Rev. 2.0
Computer Operating Properly (COP)
Register) clears the COP counter and clears bits 12 through 5
(RSR).).
Computer Operating Properly (COP)
7.8.2 Reset Status
Figure
Technical Data
15.5 COP
I/O Signals
15-1.
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