ISL6322_07 INTERSIL [Intersil Corporation], ISL6322_07 Datasheet - Page 23

• Manufacturer Part Number: ISL6322_07
• Description: Four-Phase Buck PWM Controller with Integrated MOSFET Drivers and I2C Interface for Intel VR10, VR11, and AMD Applications
• Manufacturer: INTERSIL [Intersil Corporation]

control MOSFETs. The ΔV
allowable droop in the rail of the upper gate drive.
Gate Drive Voltage Versatility
The ISL6322 provides the user flexibility in choosing the
gate drive voltage for efficiency optimization. The controller
ties the upper and lower drive rails together. Simply applying
a voltage from 5V up to 12V on PVCC sets both gate drive
rail voltages simultaneously.
Initialization
Prior to initialization, proper conditions must exist on the EN,
VCC, PVCC and the VID pins. When the conditions are met,
the controller begins soft-start. Once the output voltage is
within the proper window of operation, the controller asserts
PGOOD.
Enable and Disable
While in shutdown mode, the PWM outputs are held in a
high-impedance state to assure the drivers remain off. The
following input conditions must be met, for both Intel and
AMD modes of operation, before the ISL6322 is released
from shutdown mode to begin the soft-start startup
sequence:
1. The bias voltage applied at VCC must reach the internal
2. The voltage on EN must be above 0.85V. The EN input
FIGURE 9. BOOTSTRAP CAPACITANCE vs BOOT RIPPLE
power-on reset (POR) rising threshold. Once this
threshold is reached, proper operation of all aspects of
the ISL6322 is guaranteed. Hysteresis between the rising
and falling thresholds assure that once enabled, the
ISL6322 will not inadvertently turn off unless the bias
voltage drops substantially (see Electrical Specifications
on page 7).
allows for power sequencing between the controller bias
voltage and another voltage rail. The enable comparator
holds the ISL6322 in shutdown until the voltage at EN
1.6
1.4
1.2
0.8
0.6
0.4
0.2
0.0
1.
0.0
20nC
0.1
VOLTAGE
0.2
50nC
Q
GATE
0.3
BOOT_CAP
= 100nC
ΔV
0.4
23
BOOT_CAP
0.5
0.6
term is defined as the
(V)
0.7
0.8
0.9
1.0
ISL6322
For Intel VR10, VR11 and AMD 6-bit modes of operation
these are the only conditions that must be met for the
controller to immediately begin the soft-start sequence. If
running in AMD 5-bit mode of operation there is one more
condition that must be met:
Once all of these conditions are met the controller will begin
the soft-start sequence and will ramp the output voltage up
to the user designated level.
Intel Soft-Start
The soft-start function allows the converter to bring up the
output voltage in a controlled fashion, resulting in a linear
ramp-up. The soft-start sequence for the Intel modes of
3. The voltage on the EN_PH4 pin must be above 1.21V.
4. The driver bias voltage applied at the PVCC pins must
5. The VID code must not be 11111 in AMD 5-bit mode. This
FIGURE 10. POWER SEQUENCING USING THRESHOLD-
rises above 0.85V. The enable comparator has 110mV of
hysteresis to prevent bounce.
The EN_PH4 input allows for power sequencing between
the controller and the external driver.
reach the internal power-on reset (POR) rising threshold.
In order for the ISL6322 to begin operation, PVCC1 is the
only pin that is required to have a voltage applied that
exceeds POR. However, for 2 or 3-phase operation
PVCC2 and PVCC3 must also exceed the POR
threshold. Hysteresis between the rising and falling
thresholds assure that once enabled, the ISL6322 will not
inadvertently turn off unless the PVCC bias voltage drops
substantially (see Electrical Specifications on page 7).
code signals the controller that no load is present. The
controller will not allow soft-start to begin if this VID code
is present on the VID pins.
FAULT LOGIC
CIRCUIT
SOFT-START
POR
AND
ISL6322 INTERNAL CIRCUIT
SENSITIVE ENABLE (EN) FUNCTION
ENABLE
COMPARATOR
+
-
+
-
1.21V
0.85V
VCC
PVCC1
EN
EN_PH4
EXTERNAL CIRCUIT
10.7kΩ
1.40kΩ
February 15, 2007
+12V
FN6328.1