FIN212ACBFX FAIRCHILD [Fairchild Semiconductor], FIN212ACBFX Datasheet
FIN212ACBFX
Related parts for FIN212ACBFX
FIN212ACBFX Summary of contents
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... Ordering Information Order Number Package FIN212ACMLX MLP032A FIN212ACGFX BGA42A BGA36A FIN212ACBFX (Preliminary) © 2006 Fairchild Semiconductor Corporation FIN212AC Rev. 1.0.1 Description The FIN212AC µSerDes is a low-power serializer / deserializer optimized for use in cell phone displays and camera paths. The device reduces a 12-bit data path to four wires ...
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Pin Definitions Pin I/O type DP[1:12] CMOS-I/O CKREF CMOS-IN STROBE CMOS-IN CMOS- CKP OUT (1) DSO+(DSI-) DIFF-I/O DSO-(DSI+) CKSI+, CKSI- DIFF-IN CKSO+, DIFF-OUT CKSO- S0, S1 CMOS-IN PLL0(PWS0) CMOS-IN PLL1(PWS1) CMOS-IN TEST / CMOS_IN (XTRM) CTL_ADJ CMOS_IN (GND) DIRI IN ...
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Pin Assignments Figure Figure Figure 3. © 2006 Fairchild Semiconductor ...
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Control Logic Circuitry Mode PLL0 PLL1 ...
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Power-Down Functionality: When both S1 and S0 signals are 0, regardless of the state of the DIRI signal, the FIN212AC resets and powers down. The power-down mode shuts down all internal analog circuitry, disables the serial input and output of ...
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Serializer Operation Mode (DIRI=1) The serializer configurations are described in the following sections. The basic serialization circuitry works similarly in all modes, but the actual data and clock streams differ if the frequency of CKREF is the same as or ...
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Pulse Width Calculations Pulse Width Low Tpwl = (divOut*Pwdth)/(CKREF*14) To meet minimum pulse width specification, divOut*Pwdth≥Tpwl*(T Bit times based on PWS0, PWS1 (Pwdth = 7, 13, 17), divide by divOut = 0.954 Example: Tpwl=60ns CKREF=26MHz CKP Pulsewidth ...
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Application Diagrams The following application diagrams illustrate the most typical applications for the FIN212 device. Specific configurations of the control pins may vary based on the needs of a given system. The following recommendations are valid for all of the ...
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Application Diagrams (Continued) Figure 5. 8-Bit YUV 1.3MPixel CMOS Imager (Example Shows BGA 42-Pin Package) Serializer Configuration: PLL Frequency Mode: MODE 3 (S1=S0=1) 10-30MHz Frequency Range PLL Divide Mode: Standard Not Over-Clocked (PLL1=0, PLL0=1) Multiplier 7x Master Clock Bypass Mode: ...
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Application Diagrams (Continued) Figure 6. Serializer Configuration: PLL Frequency Mode: MODE 1 (S1=0, S0=1) CKREF=26MHz STROBE Frequency = 10 MHz PLL Divide Mode: Divide-by 2 (PLL1=1, PLL0=0) Multiplier x 3.5 Deserializer Configuration: Edge Rate Mode: SLOW MODE 1 (S1=1, S0=0) ...
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Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure ...
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DC Electrical Characteristics Values are provided for over-supply voltage and operating temperature ranges, unless otherwise specified. Symbol Parameter LVCMOS I/O V Input High Voltage IH V Input Low Voltage IL V Output High Voltage OH V Output Low Voltage OL ...
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Power Supply Currents Symbol Parameter V Power-Down Supply DD I Current DD_PD DDA DDS Dynamic Serializer Power I Supply Current DD_SER1 DD_SER1 DDA DDS DDP ...
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AC Electrical Characteristics Values are provided for over-supply voltage and operating temperature ranges, unless otherwise specified. Symbol Parameter Serializer Input Operating Conditions CKREF Clock Frequency f CKREF (5MHz - >40MHz) Strobe Frequency f Relative to CKREF STRB Frequency t CKREF ...
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AC Electrical Characteristics Values are provided for over-supply and operating temperature ranges, unless otherwise specified. Symbol Parameter Deserializer AC Electrical Characteristics CKP OUT Low Time t (10) RCOL See Figure 8 Data Valid to CKP t PDV HIGH Output Rise/Fall ...
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Logic Timing Controls Symbol Parameter t , Propagation Delay PHL_DIR t _ DIRI to /DIRO PLH DIR Propagation Delay PLZ PHZ DIRI to DP Deserializer Disable Time DISDES or S1 LOW to DPTri-State Serializer Disable ...
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Typical Performance Characteristics Setup Time OBE DP[ 1 :12] Hold Time S TR OBE :12] Data Setup: MODE0= “0” or “1”, MODE1=“1”, SER/DES=“1” Figure 7. Serializer Setup and Hold Time S1 or ...
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Tape and Reel Specifications MLP Embossed Tape Dimensions Dimensions are in millimeters unless otherwise noted Package 5x5 5.35±0.1 5.35±0.1 1.55 ±0.05 6x6 6.30±0.1 6.30±0.1 Notes ...
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Tape and Reel Specifications BGA Embossed Tape Dimensions Dimensions are in millimeters unless otherwise noted Package 3.5 x 4.5 TBD±0.1 TBD±0.1 Notes and K ...
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Physical Dimensions Dimensions are in millimeters unless otherwise noted. © 2006 Fairchild Semiconductor Corporation FIN212AC Rev. 1.0.1 Figure 11. 32-Lead, Molded Leadless Package (MLP) 20 www.fairchildsemi.com ...
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Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. © 2006 Fairchild Semiconductor Corporation FIN212AC Rev. 1.0.1 Figure 12. 42-Ball, Ball Grid Array (BGA) Package 21 www.fairchildsemi.com ...
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