FIN24C_06 FAIRCHILD [Fairchild Semiconductor], FIN24C_06 Datasheet

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FIN24C_06

Manufacturer Part Number
FIN24C_06
Description
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
©2005 Fairchild Semiconductor Corporation
FIN24C Rev. 1.0.2
FIN24C
µSerDes™Low-Voltage 24-Bit Bi-Directional
Serializer/Deserializer
Features
Applications
Ordering Information
Pb-Free package per JEDEC J-STD-020B. BGA and MLP packages available in tape and reel only.
µSerDes
Low power for minimum impact on battery life
– Multiple power-down modes
– AC coupling with DC balance
100nA in standby mode, 5mA typical operating
conditions
Cable reduction: 25:4 or greater
Bi-directional operation 50:7 reduction or greater
Up to 24 bits in either direction
Up to 20MHz parallel interface operation
Voltage translation from 1.65V to 3.6V
Ultra-small and cost-effective packaging
High ESD protection: >7.5kV HBM
Parallel I/O power supply (V
1.65V to 3.6V
Micro-controller or pixel interfaces
Image sensors
Small displays
– LCD, cell phone, digital camera, portable gaming,
Order Number
printer, PDA, video camera, automotive
FIN24CGFX
FIN24CMLX
TM
is a trademark of Fairchild Semiconductor Corporation.
Package
Number
BGA042
MLP040
DDP
) range between
Pb-Free
Yes
Yes
42-Ball Ultra Small Scale Ball Grid Array (USS-BGA),
JEDEC MO-195, 3.5mm Wide
40-Terminal Molded Leadless Package (MLP), Quad,
JEDEC MO-220, 6mm Square
General Description
The FIN24C µSerDes™ is a low-power Serializer/
Deserializer (SerDes) that can help minimize the cost
and power of transferring wide signal paths. Through the
use of serialization, the number of signals transferred
from one point to another can be significantly reduced.
Typical reduction is 4:1 to 6:1 for unidirectional paths.
For bi-directional operation, using half duplex for multiple
sources, it is possible to increase the signal reduction to
close to 10:1. Through the use of differential signaling,
shielding and EMI filters can also be minimized, further
reducing the cost of serialization. The differential signal-
ing is also important for providing a noise-insensitive sig-
nal that can withstand radio and electrical noise sources.
Major reduction in power consumption allows minimal
impact on battery life in ultra-portable applications. A
unique word boundary technique assures that the actual
word boundary is identified when the data is deserial-
ized. This guarantees that each word is correctly aligned
at the deserializer on a word-by-word basis through a
unique sequence of clock and data that is not repeated
except at the word boundary. A single PLL is adequate
for most applications, including bi-directional operation.
Package Description
www.fairchildsemi.com
October 2006
tm

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FIN24C_06 Summary of contents

Page 1

FIN24C µSerDes™Low-Voltage 24-Bit Bi-Directional Serializer/Deserializer Features Low power for minimum impact on battery life ■ – Multiple power-down modes – AC coupling with DC balance 100nA in standby mode, 5mA typical operating ■ conditions Cable reduction: 25:4 or greater ■ ...

Page 2

Functional Block Diagram CKREF STROBE DP[m+1:24] DP[1:m] Note: I Control CKP S1 S2 DIRI ©2005 Fairchild Semiconductor Corporation FIN24C Rev. 1.0.2 Word PLL 0 Boundary Generator I cksint Serializer Control Serializer oe Deserializer Deserializer cksint ...

Page 3

Terminal Description Terminal Name I/O Type DP[1:20] I/O DP[21:24 CKREF IN STROBE IN CKP OUT DSO+ / DSI– DIFF-I/O DSO– / DSI+ CKSI+, CKSI– DIFF-IN CKSO+, CKSO– DIFF-OUT DIRI IN DIRO OUT V ...

Page 4

Connection Diagrams Figure 2. Terminal Assignments for MLP (Top View (Top View) ©2005 Fairchild Semiconductor Corporation FIN24C Rev. 1.0.2 DP[9] 1 DP[10] 2 DP[11] 3 DP[12] 4 ...

Page 5

Control Logic Circuitry The FIN24C has four signals that are selectable as two unidirectional inputs and two unidirectional outputs four unidirectional inputs or four unidirectional outputs. These are often used by applications for control signals. The mode signals ...

Page 6

Control Mode When operating in 4-bit control mode, the master device must be configured as MODE 2 ( and the slave device must be configured as MODE 1 ( 1). ...

Page 7

Serializer Operation Mode The serializer configuration is described in the following sections. The basic serialization circuitry works essentially the same in these modes, but the actual data and clock streams differ depending on if CKREF is the same as the ...

Page 8

Serializer Operation Mode Serializer Operation: (Figure 6), DIRI = 1, No CKREF CKSI DP[1:24] WORD n-1 STROBE DSO CKS0 No Data Figure 6. Serializer Timing Diagram Using Provided Bit Clock (No CKREF) ©2005 Fairchild ...

Page 9

Deserializer Operation Mode The operation of the deserializer is only dependent upon the data received on the DSI data signal pair and the CKSI clock signal pair. The following two sections describe the operation of the deserializer under two distinct ...

Page 10

Embedded Word Clock Operation The FIN24C sends and receives serial data source syn- chronously with a bit clock. The bit clock has been modi- fied to create a word boundary at the end of each data word. The word boundary ...

Page 11

From – Serializer From Control + To – Deserializer Figure 10. Bi-Directional Differential I/O Circuitry PLL Circuitry The CKREF input signal is used to provide a reference to the PLL. The PLL generates internal timing signals capa- ble of ...

Page 12

REFCK Sending Unit DATA [0:23] V Figure 12. 24-Bit Unidirectional Serializer and Deserializer REFCK Control CNTL[0:3] Unit DATA [0:19] PwrDwn Figure 13. Unidirectional Control, Bi-directional Data Interface Flex Circuit Design Guidelines The serial I/O information is transmitted at a high ...

Page 13

Absolute Maximum Ratings The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not ...

Page 14

DC Electrical Characteristics Values are provided for over-supply voltage and operating temperature ranges, unless otherwise specified. Symbol Parameter LVCMOS I/O V Input High Voltage IH V Input Low Voltage IL V Output High Voltage OH V Output Low Voltage OL ...

Page 15

Power Supply Currents Symbol Parameter I V Serializer Static Supply DDA1 DDA Current I V Deserializer Static Supply DDA2 DDA Current I V Serializer Static Supply DDS1 DDS Current V Deserializer Static Supply DDS Current I V Power-Down Supply Current ...

Page 16

AC Electrical Characteristics Values are provided for over-supply voltage and operating temperature ranges, unless otherwise specified. Symbol Parameter SERIALIZER INPUT OPERATING CONDITIONS t CKREF Clock Period TCP (10 MHz–20 MHz) f CKREF Frequency Relative to REF Strobe Frequency t CKREF ...

Page 17

Notes: 4. Typical Values are given for V device and negative values refer to current flowing out of pins. Voltage is referenced to GROUND unless otherwise specified (except ΔV and Skew is measured from either the rising ...

Page 18

AC Loading and Waveforms Input Figure 14. Differential CTL Output DC Test Circuit DP[1:12] 666h CKREF CKS0- CKS0 Note: The “worst-case” test pattern produces a maximum toggling of ...

Page 19

AC Loading and Waveforms Setup Time t STC STROBE DP[1:12] Hold Time STROBE DP[1:12] Data Setup: MODE0 = “0” or “1”, MODE1 = “1”, SER/DES = “1” Figure 19. Serial Setup and Hold Time Data Valid CKP Data DP[1:12] t ...

Page 20

AC Loading and Waveforms t S_DS CKSI- V DIFF=0 CKSI+ DSI DIFF=0 ID DSI- Figure 25. Differential Input Setup and Hold Times t TPPLD0 CKREF CKS0 Note: CKREF Signal can be stopped either HIGH or LOW. Figure ...

Page 21

Tape and Reel Specification Dimensions are in millimeters unless otherwise noted. BGA Embossed Tape Dimension ±0.1 ±0.1 ±0.05 Package 3.5 x 4.5 TBD TBD 1.55 Note: 10. ...

Page 22

Tape and Reel Specification Dimensions are in millimeters unless otherwise noted. MLP Embossed Tape Dimension ±0.1 ±0.1 ±0.05 Package 5.35 5.35 1. ...

Page 23

Physical Dimensions Dimensions are in millimeters unless otherwise noted. 2X 0.10 C TERMINAL A1 CORNER INDEX AREA (QA CONTROL VALUE) 1.00 MAX 0. SEATING PLANE Figure 31. Pb-Free, 42-Ball, Ultra Small Scale Ball Grid Array (USS-BGA), ...

Page 24

Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 32. Pb-Free, 40-Terminal, Molded Leadless Package (MLP), Quad, JEDEC MO-220, 6mm Square ©2005 Fairchild Semiconductor Corporation FIN24C Rev. 1.0.2 (DATUM A) 24 www.fairchildsemi.com ...

Page 25

TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ GlobalOptoisolator™ Bottomless™ GTO™ Build it Now™ ...

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