ADUC847BCP8-5 AD [Analog Devices], ADUC847BCP8-5 Datasheet - Page 23

• Manufacturer Part Number: ADUC847BCP8-5
• Description: MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU
• Manufacturer: AD [Analog Devices]

Internal XRAM
The ADuC845, ADuC847, and ADuC848 contain 2 kbytes of
on-chip extended data memory. This memory, although on-
chip, is accessed via the MOVX instruction. The 2 kbytes of
internal XRAM are mapped into the bottom 2 kbytes of the
external address space if the CFG84x.0 (Table 7) bit is set;
otherwise, access to the external data memory occurs just like a
standard 8051.
Even with the CFG84x.0 bit set, access to the external (off chip),
XRAM occurs once the 24-bit DPTR is greater than 0007FFH.
When enabled and when accessing the internal XRAM, the P0
and P2 port pin operations, as well as the RD and WR strobes,
do not operate as a standard 8051 MOVX instruction. This
allows the user to use these port pins as standard I/O. The
internal XRAM can be configured as part of the extended 11-bit
stack pointer. By default, the stack operates exactly like an 8052
in that it rolls over from FFH to 00H in the general-purpose
RAM. On the ADuC845, ADuC847, and ADuC848, however, it
BITS IN PSW
SELECTED
BANKS
FFFFFFH
000000H
VIA
Figure 8. Lower 128 Bytes of Internal Data Memory
10
11
01
00
CFG845/7/8.0 = 0
EXTERNAL
ADDRESS
Figure 9. Internal and External XRAM
MEMORY
SPACE)
SPACE
(24-BIT
30H
20H
18H
10H
08H
00H
DATA
7FH
2FH
1FH
17H
0FH
07H
FFFFFFH
0007FFH
000800H
000000H
BIT-ADDRESSABLE
(BIT ADDRESSES)
FOUR BANKS OF EIGHT
REGISTERS
R0 TO R7
GENERAL-PURPOSE
AREA
CFG845/7/8.0 = 1
RESET VALUE OF
STACK POINTER
EXTERNAL
ADDRESS
2 kBYTES
MEMORY
ON-CHIP
SPACE)
SPACE
(24-BIT
XRAM
DATA
Rev. A | Page 23 of 108
is possible (by setting CFG845.7/ADuC847.7/ADuC848.7) to
enable the 11-bit extended stack pointer. In this case, the stack
rolls over from FFH in RAM to 0100H in XRAM.
The 11-bit stack pointer is visible in the SPH and SP SFRs. The
SP SFR is located at 81H as with a standard 8052. The SPH SFR
is located at B7H. The 3 LSBs of the SPH SFR contain the 3
extra bits necessary to extend the 8-bit stack pointer in the SP
SFR into an 11-bit stack pointer.
External Data Memory (External XRAM)
There is no support for external program memory access to the
parts. However, just like a standard 8051 compatible core, the
ADuC845/ADuC847/ADuC848 can access external data
memory using a MOVX instruction. The MOVX instruction
automatically outputs the various control strobes required to
access the data memory. The parts, however, can access up to
16 Mbytes of external data memory. This is an enhancement of
the 64 kbytes of external data memory space available on a
standard 8051 compatible core. See the Hardware Design
Considerations section for details.
When accessing external RAM, the EWAIT register might need
to be programmed to give extra machine cycles to the MOVX
operation. This is to account for differing external RAM access
speeds.
EWAIT SFR
SFR Address:
Power-On Default:
Bit Addressable:
This special function register (SFR), when programmed,
dictates the number of wait states for the MOVX instruction.
The value can vary between 0H and 7H. The MOVX instruction
increases by one machine cycle (4 + n, where n = EWAIT
number in decimal) for every increase in the EWAIT value.
CFG845/7/8.7 = 0
FFH
00H
Figure 10. Extended Stack Pointer Operation
ON-CHIP DATA
256 BYTES OF
ADuC845/ADuC847/ADuC848
(DATA +
STACK)
RAM
9FH
00H
No
CFG845/7/8.7 = 1
07FFH
100H
00H
ON-CHIP XRAM
(DATA + STACK
ON-CHIP XRAM
FOR EXSP = 0)
(DATA ONLY)
FOR EXSP = 1,
LOWER 256
UPPER 1792
DATA ONLY
BYTES OF
BYTES OF