ADUC847BCP8-5 AD [Analog Devices], ADUC847BCP8-5 Datasheet - Page 49

• Manufacturer Part Number: ADUC847BCP8-5
• Description: MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU
• Manufacturer: AD [Analog Devices]

FLASH/EE PROGRAM MEMORY
The ADuC845/ADuC847/ADuC848 contain a 64-kbyte array of
Flash/EE program memory. The lower 62 kbytes of this program
memory are available to the user for program storage or as
additional NV data memory.
The upper 2 kbytes of this Flash/EE program memory array
contain permanently embedded firmware, allowing in-circuit
serial download, serial debug, and nonintrusive single-pin
emulation. These 2 kbytes of embedded firmware also contain a
power-on configuration routine that downloads factory
calibrated coefficients to the various calibrated peripherals such
as ADC, temperature sensor, current sources, band gap, and
references.
These 2 kbytes of embedded firmware are hidden from the user
code. Attempts to read this space read 0s; therefore, the embedded
firmware appears as NOP instructions to user code.
In normal operating mode (power-on default), the 62 kbytes of
user Flash/EE program memory appear as a single block. This
block is used to store the user code as shown in Figure 28.
In normal mode, the 62 kbytes of Flash/EE program memory
can be programmed by serial downloading and by parallel
programming.
KERNEL OR IN PARALLEL PROGRAMMING MODE.
PERMANENTLY EMBEDDED DOWNLOAD/DEBUG
PERMANENTLY EMBEDDED FIRMWARE ALLOWS
300
250
200
150
100
62 kBYTES OF FLASH/EE PROGRAM MEMORY
50
62 kBYTES OF ON-CHIP PROGRAM MEMORY.
CODE TO BE DOWNLOADED TO ANY OF THE
ARE AVAILABLE TO THE USER. ALL OF THIS
0
THE KERNEL PROGRAM APPEARS AS NOP
SPACE CAN BE PROGRAMMED FROM THE
Figure 28. Flash/EE Program Memory Map in Normal Mode
EMBEDDED DOWNLOAD/DEBUG KERNEL
40
INSTRUCTIONS TO USER CODE.
USER PROGRAM MEMORY
Figure 27. Flash/EE Memory Data Retention
50
T
J
60
JUNCTION TEMPERATURE (°C)
ADI SPECIFICATION
100 YEARS MIN.
AT T
70
J
= 55°C
80
90
62kBYTE
100
2kBYTE
FFFFH
F7FFH
F800H
0000H
110
Rev. A | Page 49 of 108
Serial Downloading (In-Circuit Programming)
The ADuC845/ADuC847/ADuC848 facilitates code download
via the standard UART serial port. The parts enter serial down-
load mode after a reset or a power cycle if the PSEN pin is pulled
low through an external 1 kΩ resistor. Once in serial download
mode, the hidden embedded download kernel executes. This
allows the user to download code to the full 62 kbytes of Flash/EE
program memory while the device is in circuit in its target
application hardware.
A PC serial download executable (WSD.EXE) is provided as
part of the ADuC845/ADuC847/ADuC848 Quick Start
development system. Application Note uC004 fully describes
the serial download protocol that is used by the embedded
download kernel. This application note is available at
www.analog.com/microconverter.
Parallel Programming
The parallel programming mode is fully compatible with
conventional third-party flash or EEPROM device programmers.
A block diagram of the external pin configuration required to
support parallel programming is shown in Figure 29. In this
mode, Ports 0 and 2 operate as the external address bus interface,
P3 operates as the external data bus interface, and P1.0 operates
as the write enable strobe. P1.1, P1.2, P1.3, and P1.4 are used as
general configuration ports that configures the device for
various program and erase operations during parallel
programming.
The command words that are assigned to P1.1, P1.2, P1.3, and
P1.4 are described in Table 31.
Table 31. Flash/EE Memory Parallel Programming Modes
P1.4
0
1
0
1
0
1
1
All other codes
COMMAND
ENABLE
TIMING
P1.3
0
0
0
0
0
1
1
Port 1 Pins
Figure 29. Flash/EE Memory Parallel Programming
P1.2
0
1
1
1
1
0
0
+5V
ADuC845/ADuC847/ADuC848
P1.1
0
0
0
1
1
0
1
P1.4–P1.1
P1.7–P1.5
P1.0
ADuC845/
ADuC847/
ADuC848
Programming Mode
Erase Flash/EE Program, Data, and
Security Mode
Program Code Byte
Program Data Byte
Read Code Byte
Read Data Byte
Program Security Modes
Read/Verify Security Modes
Redundant
P3.7–P3.0
RESET
EA
DATA
GND
V
DD