HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 104

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Bit 3: DTON
0
1
Bit 2—Medium Speed on Flag (MSON): After standby, watch, or sleep mode is cleared, this bit
selects active (high-speed), active (medium-speed), or sleep (medium-speed) mode.
Bit 2: MSON
0
1
Bits 1 and 0— Subactive Mode Clock Select (SA1 and SA0): These bits select the CPU clock
rate (ø
Bit 1: SA1
0
1
Note: * Don’t care
W
/2, ø
W
/4, or ø
Description
Description
Bit 0: SA0
0
1
*
W
/8) in subactive mode. SA1 and SA0 cannot be modified in subactive mode.
When a SLEEP instruction is executed in active mode, a transition is made
to standby mode, watch mode, or sleep mode
When a SLEEP instruction is executed in subactive mode, a transition is
made to watch mode or subsleep mode
When a SLEEP instruction is executed in active (high-speed) mode, a
direct transition is made to active (medium-speed) mode if SSBY = 0,
MSON = 1, and LSON = 0, or to subactive mode if SSBY = 1, TMA3 = 1,
and LSON = 1
When a SLEEP instruction is executed in active (medium-speed) mode, a
direct transition is made to active (high-speed) mode if SSBY = 0, MSON =
0, and LSON = 0, or to subactive mode if SSBY = 1, TMA3 = 1, and LSON
= 1
When a SLEEP instruction is executed in subactive mode, a direct
transition is made to active (high-speed) mode if SSBY = 1, TMA3 = 1,
LSON = 0, and MSON = 0, or to active (medium-speed) mode if SSBY = 1,
TMA3 = 1, LSON = 0, and MSON = 1
After standby, watch, or sleep mode is cleared, operation is in active (high-
speed) mode
When a SLEEP instruction is executed in active mode, a transition is made
to sleep (high-speed) mode
After standby, watch, or sleep mode is cleared, operation is in active
(medium-speed) mode
When a SLEEP instruction is executed in active mode, a transition is made
to sleep (medium-speed) mode
Description
ø
ø
ø
W
W
W
/8
/4
/2
(initial value)
(initial value)
(initial value)
95