HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 105

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

5.2
5.2.1
Transition to Sleep (High-Speed) Mode: The system goes from active mode to sleep (high-
speed) mode when a SLEEP instruction is executed while the SSBY and LSON bits in SYSCR1
and the MSON and DTON bits in SYSCR2 are all cleared to 0. In sleep (high-speed) mode CPU
operation is halted but the on-chip peripheral functions other than PWM are operational. CPU
register contents are retained.
Transition to Sleep (Medium-Speed) Mode: The system goes from active mode to sleep
(medium-speed) mode when a SLEEP instruction is executed while the SSBY and LSON bits in
SYSCR1 are cleared to 0, the MSON bit in SYSCR2 is set to 1, and the DTON bit in SYSCR2 is
cleared to 0. In sleep (medium-speed) mode, as in sleep (high-speed) mode, CPU operation is
halted but the on-chip peripheral functions other than PWM are operational. The clock frequency
in sleep (medium-speed) mode is determined by the MA1 and MA0 bits in SYSCR1. CPU register
contents are retained.
5.2.2
Sleep mode is cleared by any interrupt (timer A, timer B1, timer X, timer V, IRQ
INT
5.2.3
Operation in sleep (medium-speed) mode is clocked at the frequency designated by the MA1 and
MA0 bits in SYSCR1.
96
Clearing by interrupt
When an interrupt is requested, sleep mode is cleared and interrupt exception handling starts.
A transition is made from sleep (high-speed) mode to active (high-speed) mode, or from sleep
(medium-speed) mode to active (medium-speed) mode. Sleep mode is not cleared if the I bit of
the condition code register (CCR) is set to 1 or the particular interrupt is disabled in the
interrupt enable register.
Clearing by RES input
When the RES pin goes low, the CPU goes into the reset state and sleep mode is cleared.
0
, SCI
Sleep Mode
Transition to Sleep Mode
Clearing Sleep Mode
Clock Frequency in Sleep (Medium-Speed) Mode
3
, SCI
1
, or A/D converter), or by input at the RES pin.
3
to IRQ
0
, INT
7
to