74LCX125BQX_08 FAIRCHILD [Fairchild Semiconductor], 74LCX125BQX_08 Datasheet

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74LCX125BQX_08

Manufacturer Part Number
74LCX125BQX_08
Description
Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
1.74LCX125BQX_08.pdf (13 pages)
©1995 Fairchild Semiconductor Corporation
74LCX125 Rev. 1.7.0
74LCX125
Low Voltage Quad Buffer with 5V Tolerant
Inputs and Outputs
Features
Note:
1. To ensure the high-impedance state during power up
Ordering Information
Note:
2. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
74LCX125M
74LCX125SJ
74LCX125BQX
74LCX125MTC
Order Number
5V tolerant inputs and outputs
2.3V–3.6V V
6.0ns t
Power down high impedance inputs and outputs
Supports live insertion/withdrawal
±24mA output drive (V
Implements proprietary noise/EMI reduction circuitry
Latch-up performance exceeds JEDEC 78 conditions
ESD performance:
– Human body model
– Machine model
Leadless DQFN package
or down, OE should be tied to V
resistor: the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
All packages are lead free per JEDEC: J-STD-020B standard.
PD
max. (V
CC
(2)
specifications provided
CC
Package
Number
100V
MLP14A
MTC14
M14A
M14D
CC
3.3V), 10µA I
2000V
3.0V)
CC
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
(1)
through a pull-up
CC
max.
General Description
The LCX125 contains four independent non-inverting
buffers with 3-STATE outputs. The inputs tolerate volt-
ages up to 7V allowing the interface of 5V systems to 3V
systems.
The 74LCX125 is fabricated with an advanced CMOS
technology to achieve high speed operation while main-
taining CMOS low power dissipation.
Package Description
February 2008
www.fairchildsemi.com

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74LCX125BQX_08 Summary of contents

Page 1

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs Features 5V tolerant inputs and outputs 2.3V–3.6V V specifications provided CC 6.0ns t max. (V 3.3V), 10µ Power down high impedance inputs and outputs Supports live ...

Page 2

Connection Diagrams Pin Assignments for SOIC, SOP, and TSSOP (Top View) Pad Assignments for DQFN (Top Through View) Pin Description Pin Names Description A Inputs n OE Output Enable Inputs n O Outputs n ©1995 Fairchild Semiconductor Corporation 74LCX125 Rev. ...

Page 3

Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure ...

Page 4

DC Electrical Characteristics Symbol Parameter V HIGH Level Input Voltage IH V LOW Level Input Voltage IL V HIGH Level Output Voltage OH V LOW Level Output Voltage OL I Input Leakage Current I I 3-STATE Output Leakage OZ I ...

Page 5

Dynamic Switching Characteristics Symbol Parameter V Quiet Output Dynamic Peak V OLP V Quiet Output Dynamic Valley V OLV Capacitance Symbol Parameter C Input Capacitance IN C Output Capacitance OUT C Power Dissipation Capacitance PD ©1995 Fairchild Semiconductor Corporation 74LCX125 ...

Page 6

AC Loading and Waveforms Figure 1. AC Test Circuit (C Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t 3-STATE Output Low Enable and Disable Times for Logic Figure 2. Waveforms (Input Characteristics 1MHz, t ...

Page 7

Schematic Diagram (Generic for LCX Family) ©1995 Fairchild Semiconductor Corporation 74LCX125 Rev. 1.7.0 7 www.fairchildsemi.com ...

Page 8

Tape and Reel Specification Tape Format for DQFN Package Designator BQX Leader (Start End) Trailer (Hub End) Tape Dimensions inches (millimeters) Reel Dimensions inches (millimeters) Tape Size A 12mm 13.0 (330.0) 0.059 (1.50) ©1995 Fairchild Semiconductor Corporation 74LCX125 Rev. 1.7.0 ...

Page 9

Physical Dimensions 8.75 8.50 7.62 14 6.00 1 PIN ONE 1.27 INDICATOR (0.33) 1.75 MAX 1.50 1.25 R0.10 R0.10 8° 0° 0.90 0.50 (1.04) DETAIL A SCALE: 20:1 Figure 3. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow ...

Page 10

Physical Dimensions (Continued) Figure 4. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or ...

Page 11

Physical Dimensions (Continued) Figure 5. 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please ...

Page 12

Physical Dimensions (Continued) 0.43 TYP A. CONFORMS TO JEDEC REGISTRATION MO-153, VARIATION AB, REF NOTE 6 B. DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONING AND TOLERANCES PER ANSI Y14.5M, ...

Page 13

TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ ...

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