FDC6301N_01 FAIRCHILD [Fairchild Semiconductor], FDC6301N_01 Datasheet
FDC6301N_01
Manufacturer Part Number
FDC6301N_01
Description
Dual N-Channel , Digital FET
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
1.FDC6301N_01.pdf
(5 pages)
Symbol
V
V
I
P
T
ESD
THERMAL CHARACTERISTICS
R
R
© 2001 Fairchild Semiconductor Corporation
D
Absolute Maximum Ratings
DSS
GSS
, I
D
J
General Description
These dual N-Channel logic level enhancement mode field
effect transistors are produced using Fairchild 's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
This
applications as a replacement for digital transistors. Since bias
resistors are not required, these N-Channel FET's can replace
several digital transistors, with a variety of bias resistors.
,T
FDC6301N
Dual N-Channel , Digital FET
JA
JC
OUT
STG
, V
, V
SOT-23
CC
IN
device has been designed especially for low voltage
Parameter
Drain-Source Voltage, Power Supply Voltage
Gate-Source Voltage, V
Drain/Output Current
Maximum Power Dissipation
Operating and Storage Temperature Range
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
SuperSOT
Mark: .301
IN
TM
-6
- Continuous
- Pulsed
T
A
= 25
o
C unless other wise noted
SuperSOT
(Note 1a)
(Note 1a)
(Note 1b)
(Note 1)
6
4
5
TM
-8
Features
SO-8
25 V, 0.22 A continuous, 0.5 A Peak.
Very low level gate drive requirements allowing direct
operation in 3V circuits. V
Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model.
2
1
3
R
R
DS(ON)
DS(ON)
- 0.5 to +8
FDC6301N
-55 to 150
IN
= 4
0.22
= 5
140
6.0
0.5
0.9
0.7
25
60
SOT-223
@ V
@ V
GS(th)
I N V E R T E R A P P L I C A T I O N
GS
GS
< 1.5V.
= 4.5 V.
= 2.7 V
G
D
September 2001
SOIC-16
S
FDC6301N Rev.D
Units
°C/W
°C/W
°C
kV
W
V
V
A
Vcc
O U T
GND
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FDC6301N_01 Summary of contents
Page 1
FDC6301N Dual N-Channel , Digital FET General Description These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild 's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state ...
Page 2
Electrical Characteristics (T A Symbol Parameter OFF CHARACTERISTICS BV Drain-Source Breakdown Voltage DSS Breakdown Voltage Temp. Coefficient DSS J Zero Gate Voltage Drain Current I DSS I Gate - Body Leakage Current GSS ON CHARACTERISTICS (Note 2) ...
Page 3
Typical Electrical Characteristics 0 4.5V GS 3.5 3.0 0.4 2.7 2.5 0.3 0.2 2.0 0 DRAIN-SOURCE VOLTAGE (V) DS Figure 1. On-Region Characteristics. 1 0. ...
Page 4
Typical Electrical Characteristics (continued 0. 0.1 0.2 0 GATE CHARGE (nC) g Figure 7. Gate Charge Characteristics 1 0.5 0.2 0.1 0. 2.7V GS SINGLE PULSE ...
Page 5
CROSSVOLT â â â â Rev. H5 ...