AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 11

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Processor and Architecture
ARM7TDMI Processor
Debug and Test Features
Memory Controller
6071A–ATARM–28-Oct-04
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RISC processor based on ARMv4T Von Neumann architecture
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Two instruction sets
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Three-stage pipeline architecture
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Integrated embedded in-circuit emulator
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Debug Unit
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IEEE1149.1 JTAG Boundary-scan on all digital pins
Bus Arbiter
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Address decoder provides selection signals for
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Abort Status Registers
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Misalignment Detector
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Remap Command
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Embedded Flash Controller
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Runs at up to 55 MHz, providing 0.9 MIPS/MHz
ARM
Thumb
Instruction Fetch (F)
Instruction Decode (D)
Execute (E)
Two watchpoint units
Test access port accessible through a JTAG protocol
Debug communication channel
Two-pin UART
Debug communication channel interrupt handling
Chip ID Register
Handles requests from the ARM7TDMI and the Peripheral Data Controller
Three internal 1 Mbyte memory areas
One 256 Mbyte embedded peripheral area
Source, Type and all parameters of the access leading to an abort are saved
Facilitates debug by detection of bad pointers
Alignment checking of all data accesses
Abort generation in case of misalignment
Remaps the SRAM in place of the embedded non-volatile memory
Allows handling of dynamic exception vectors
Embedded Flash interface, up to three programmable wait states
Prefetch buffer, buffering and anticipating the 16-bit requests, reducing the
required wait states
Key-protected program, erase and lock/unlock sequencer
Single command for erasing, programming and locking operations
Interrupt generation in case of forbidden operation
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high-performance 32-bit instruction set
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high code density 16-bit instruction set
AT91SAM7S32 Preliminary
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