AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 254

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Read/Write
Flowcharts
254
AT91SAM7S32 Preliminary
The following flowcharts shown in Figure 98 on page 254 and in Figure 99 on page 255 give
examples for read and write operations in Master Mode. A polling or interrupt method can be
used to check the status bits. The interrupt method requires that the interrupt enable register
(TWI_IER) be configured first.
Figure 98. TWI Write in Master Mode
TWI_THR = data to send
Yes
Set the Master Mode register:
Internal address size = 0?
Write ==> bit MREAD = 0
TWI_THR = Data to send
Set the control register:
- Device slave address
- Internal address size
- Transfer direction bit
Load transmit register
TWI_CWGR = clock
Read status register
Read status register
TWI_CR = START
TWI_CR = MSEN
TWI_CR = STOP
Start the transfer
Stop the transfer
- Master enable
TXCOMP = 0?
Set TWI clock:
Data to send?
TXRDY = 0?
Yes
START
END
Yes
Yes
Set theinternal address
TWI_IADR = address
6071A–ATARM–28-Oct-04