AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 67
AT91SAM7S32-AI
Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91SAM7S32-AI.pdf
(446 pages)
- Current page: 67 of 446
- Download datasheet (3Mb)
Periodic Interval Timer Mode Register
Register Name: PIT_MR
Access Type:
• PIV: Periodic Interval Value
Defines the value compared with the primary 20-bit counter of the Periodic Interval Timer (CPIV). The period is equal to
(PIV + 1).
• PITEN: Period Interval Timer Enabled
0 = The Periodic Interval Timer is disabled when the PIV value is reached.
1 = The Periodic Interval Timer is enabled.
• PITIEN: Periodic Interval Timer Interrupt Enable
0 = The bit PITS in PIT_SR has no effect on interrupt.
1 = The bit PITS in PIT_SR asserts interrupt.
6071A–ATARM–28-Oct-04
31
23
15
–
–
7
Read/Write
30
22
14
–
–
6
29
21
13
–
–
5
28
20
12
–
–
4
PIV
PIV
27
19
11
–
3
AT91SAM7S32 Preliminary
26
18
10
–
2
PIV
PITIEN
25
17
9
1
PITEN
24
16
8
0
67
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