AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 120

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Peripheral Data Controller (PDC) User Interface
Table 44. Peripheral Data Controller (PDC) Register Mapping
Note:
120
Offset
0x100
0x104
0x108
0x10C
0x110
0x114
0x118
0x11C
0x120
0x124
1. PERIPH: Ten registers are mapped in the peripheral memory space at the same offset. These can be defined by the user
AT91SAM7S32 Preliminary
according to the function and the peripheral desired (DBGU, USART, SSC, SPI, MCI etc).
Receive Pointer Register
Register
Receive Counter Register
Transmit Pointer Register
Transmit Counter Register
Receive Next Pointer Register
Receive Next Counter Register
Transmit Next Pointer Register
Transmit Next Counter Register
PDC Transfer Control Register
PDC Transfer Status Register
Register Name
PERIPH
PERIPH_RCR
PERIPH_TPR
PERIPH_TCR
PERIPH_RNPR
PERIPH_RNCR
PERIPH_TNPR
PERIPH_TNCR
PERIPH_PTCR
PERIPH_PTSR
(1)
_RPR
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Write-only
Read-only
6071A–ATARM–28-Oct-04
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
-
0x0